Translation; Programming Accessible Registers - HP Vectra Reference Manual

Translation
Data written to the CRTC passes through a translation circuit to
allow applications written for a 15kHz monitor to operate without
modification when a 25kHz monitor is connected. In this way the
actual monitor connected is transparent to the program. The low
four bits of any data written to the address index register is also
latched external to the CRTC in a phase alternation line (PAL).
When a subsequent write is performed to the data register of the
CRTC, the latched data and the actual data written are combined
and used as an address into the translation ROM. It is the data
contained in the ROM that is written into the CRTC.
The translation will occur for any register needing it if the data
written to the register is in the range OOH to 7FH. If an application
needs to set a register to a specific value without translation, bit 7
must be set to 1. Data in the range 80 to FF will then be written
to the chip as OOH to 7FH. The translation occurs only on the data
written to the CRTC and only when a 25kHz monitor is
connected. Data is read back directly from the chip. Translation
will also occur for any monitor if the 50Hz jumper is installed.
Again, values greater than 80H will be passed with bit 7 set to
o.
Programming Accessible Registers
The application must read the status register bit 4 to determine
which monitor is connected. No harm will be done setting the
400 line mode bit with a 200 line monitor connected, but the
display will not be as expected.
At power-on or reset all bits are cleared in I/O registers except the
light pen latch. The following table lists the I/O registers.
Multi-Mode Video Adapter Card 91