Table of Contents
Advertisement
2-8
Impedance converter (see Fig,
The input signal is fed via FET V501 (in source-follower cor?figuration), transistors V503, V504 and V508 to
the low-impedance attenuator.
The special type FET V501, with very fast rise-time response, reduces the source impedance which prevents
bandwidth loss.
The FET consists of a double gate. One gate is not used and connected to the drain via R521.
The input signal is applied to the other gate.
The diodes inside this FET protect the input source follower of the impedance converter against excessive
voltage swings.
The 1.f. part of the signal is fed to the inverting input, pin 2, of D502 via the LF gain potentiometer R538.
This 1.f. signal is compared with a d.c. voltage on pin 3 of D502 that is adjustable with R547 (attenuator
balance).
The output of D502 (frequencies up to 300 Hz, determined by R539 and C527 is routed to the voltage
divider R543, R518.
The input signal of the impedance converter is fed t o the other end of the voltage divider. The average value of
both signals is fed to the inverting input of the correction amplifier D501. To reduce distortion originated in
the current source V507, transistor V506 is mounted between the low-ohmic output of D501 and the base of
The collector of V506 is high-ohmic, so the distortion on the base and on the emitter of V507 is equal and is
eliminated.
If the feedback 1.f. signal is, for example, too small, the correction amplifier will drive transistor V507 so that
the amplitude of the 1.f. part
Potentiometer R538 permits adjustment of the 1.f. feedback gain. The d.c. offset of the operational amplifiers
---
ATT
I
Fig.
2.2.
Impedance converter
2.2.
and 8.3.)
of
the input signal is compensated.
IMPEDANCE
CONVERTOR
V501
V506
V504
V507
CORRECTION
SIGNAL
I
ATT. BALANCE
ATT
I
MAT 1161
Advertisement
Table of Contents
