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2-24
Inputs D218-9/10 are H if X DEFL is selected or if the DTB TIME/DIV switch in OFF (V285 non-
conductive).
Input D218-11 is H if ALT TB is selected or if t h e final X amplifier is fed from the DTB signal. As a result,
output D218-8 is L (i.e. display blanked), if DTB TIME/DIV switch is OFF while DTB or A L T TB selected
on S2. The display is also blanked if
display.
L
I) A
TERNA TE mode control logic (see Fig. 2.7)
This circuit produces clock-pulses for the vertical display mode logic. I t consists of NOR
D208 (11,12,13), D208 (8,9,10) and NAND gate D206 (8,9,10).
The pulses are routed via the switch unit t o UNIT
The vertical display switches from one channel t o the other if output D206-8 goes from L t o H.
The circuit operates as follows:
If the horizontal deflection is initiated by MTB or DTB only, input D208-11 i s L. Normally, input D208-12 is
H, but i s L during the flybackperiod of the MTB
from H t o L ( a t start of MTB flyback) this transition is routed via D208 (11,12,13), D208 (8,9,10) and D206
from one t o the other.
ALT T B
Fig. 2.7 Important voltage-waveforms in the alternate mode control logic
I f the A L T TB mode is selected, input D208/12 also goes from H t o L a t the start of the MTB flyback period.
Input D208/11 is H if the MTB drives the final X amplifier, and L if the DTB drives the final X amplifier.
As a result, the H t o L transition of input D208/12 only gives a L to H transition of output D206/8 if the
DTB drives the final X amplifier.
Thus the display sequence in the A L T TB mode combined with ALTernate vertical display is:
Channel A with MTB intensified by DTB
-
- Channel A with DTB
- Channel B with MTB intensified by DTB
- Channel B with DTB
- Channel A with MTB intensified
This circuit consists of operational amplifier D201 and transistor V200. The circuit converts + I 4 V into + I 2 V
for the time-base, and the current drain from + I 4 V is constant. The reference voltage for the positive input of
D201 is obtained via voltage divider R201, R202 from the + I 4
nected t o the + I 2 V output voltage. Any variation between reference voltage and output voltage is corrected
via output D201-6 and emitter-follower V200.
X
DEFL is selected together with DTB or A L T TB for horizontal
MTB O R DTB O NL Y - '
by
DTB, and so on.
3.
MAT
V
supply. The negative input of D201 is con-
D208 (1,2,3),
gates
If input 0208-12 goes
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