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MTB intensified
DTB
by
When this mode is selected, the input of the F I N A L HORIZONTAL AMPLIFIER i s derived from the MTB
output and the DTB TIME/DIV switch does not occupy the OFF position.
Input D217-2 i s H during the MTB sweep, which means that D217-3 and input D218-13 are also H during the
sweep period.
Input D217-5 i s H if the MTB output signal is routed t o the final X amplifier. As
With input D218-1 also H, the output of this 3 -input NAND
(compare this with Fig. 2.6/2).
Input D217-10 is H during the DTB sweep, which means that output D217-8 i s
also input D218-4.
A logic L on input D206-2 makes output D206-3 and also input D217-13 logic H. Output D217-11 i s therefore
H and also input D218-5.
H, so output D218-6 i s L during the DTB sweep (compare this with Fig. 2.6/2).
Input D218-3
i s
Therefore with L signal on NAND-gate output D218-12 during the MTB sweep, transistor V288 conducts.
With an L signal on NAND-gate output D218-6 during the DTB sweep, transistor V289 conducts, and during
that time the current from the Z amplifier doubles providing that preset R401 i s in mid-position. This increase
in current produces the intensified part of the MTB trace during the DTB sweep.
ALT TB mode
When A L T TB i s selected, NAND-gate output D218-6 i s L during the DTB sweep, in the same way as described
for the 'DTB only' mode (compare with Fig. 2.6/4 and Fig. 2.6/3).
For NAND-gate output D218-12 this situation i s as follows:
- for one MTB sweep, the output is L during that MTB sweep,
for the next MTB sweep the output i s
-
This depends on the condition of flip-flop D207 ( 8
between MTB (D218-12 L during MTB sweep) and DTB (D218-12 L during DTB sweep).
The generation of these pulses occurs as follows:
If the MTB i s used for X-deflection then D217-I is L. Pin 2 i s H during the MTB sweep, so D217-3 and
-
D218-13 are also H during the MTB sweep.
Input D217-5 i s also H, which makes output D217-6 a logic H.
Thus input D218-1 is H and since input D218-2 is H, the three inputs of the NAND-gate are a t H, which
gives a logic
L on output D218-12 during the MTB sweep (compare with Fig. 2.6/4).
- I f the DTB i s used for X-deflextion (the next MTB sweep) then 0217-5 i s L. Pin 4 i s H during the DTB
sweep, so D217-6 and D218-1 are also H during the DTB sweep.
Input D217-1 i s H, which makes output D217-3 and input D218-13 logic H. As the remaining input,
D218-2 i s H, then the NAND-gate output D218-12 i s L during the DTB sweep (compare with Fig. 2.6/4).
A t the next MTB sweep, the MTB i s again selected for X-deflection and D218-12 i s L during the MTB
-
sweep, and so on.
Display Blanking
In the foregoing circuit descriptions for display blanking in MTB, MTB intensified DTB and A L T TB modes, it
is assumed that inputs 2 and 3 of D218 are permanently a t logic H. However, there are certain conditions,
listed below, when these inputs are L and the display is blanked.
- In the chopped mode of the vertical channels the display i s blanked during switching over between channels,
by connecting the cathode o f diode V296 t o earth for this period.
- If a logic L is applied t o the external Z MOD input on the rear-panel, this signal is routed via diode V297 t o
inputs 2 and 3 of D218 for blanking purposes.
- The display is blanked if an incorrect
gate
L
during the DTB sweep.
...
mode is selected. This condition i s detected by NAND gates Q218
result, OR-gate output
a
during the DTB sweep and
2-23
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