Philips PM32671 Service Manual page 26

! -
The vertical channel switches D831 and D631 are controlled by the vertical channel selection logic (D632,
ADD, B.
These switches control the vertical logic via connectors X204 (on SWITCH UNIT A102) and X501.
Positive logic is used in the digital circuits; i.e. '1' is +5 V (H) and logic
The table, Fig. 2.4., indicates the logic used for vertical mode selection.
Selection of the various vertical display mode pushbuttons has the following result:
A depressed
B depressed:
TRIG VIEW
depressed
CHOP depressed:
A LT depressed
ADD depressed:
depressed:
Pin 8 of D632 i s H in this mode, opening the signal path for channel A in integrated
:
circuit D631.
Signals on D631 pins 5 and 6 are routed to output pin 13, 14.
Pin 11 of D632 is a t H level in this mode, opening the signal path for channel B in inte-
grated circuit D631.
Signals on 0631 pins 3 and 4 are routed to the output (pins 13,141.
Pin 3 of D632 is H in this mode, opening the path for trigger view signals in integrated
:
circuit D831.
The trigger view signal from the INTERFACE of the trigger amplifier (V861, V862) is
routed to D831, pins 5 and 6, via transistors V831, V832.
In this mode, the TRIG VIEW signal is fed to the DELAY LINE DRIVER via the out-
puts (13,141 of D831.
Pins 8 and 11 of D632 are alternately H and L a t a fixed frequency of 500 kHz approx.,
generated by the chopper oscillator, consisting of transistor V632 and two NAND gates
of D633 (1 1,12, 13) (4,5,6) and capacitor C643.
If D632-6 is a t H level, transistor V631 starts the chopper oscillator. Transistor V632 is
blocked and C632 charges via R653.
If pins 12 and 13 of D633 are both H, i t s output goes to an L level, giving an H on pin 6
of D633. This H signal is fed back
C643 to give an L on 0633-12.
Pin 6 of D633 goes L and blocks transistor V632, etc.
The chopper signal is applied to the clock inputs of the flip-flops D634 via D633, pins
The J and K inputs (pins 2 and 3) and the preset and clear inputs (pins 4 and 15) of
D634 are
a t level H, so this flip-flop switches on the chopper frequency applied to the
clock input.
The input pin 10 of D634 is L and pin 14 is H, so output pin 7 is L in this mode, resul-
ting in a level L o n D632-3 (TRIG VIEW is off).
In the ALT mode, the chopper oscillator i s switched off (D632-6
:
However, D633-10 is H, which means that the alternate pulses from the HORIZONTAL
CHANNEL SELECTION LOGIC are applied to the clock inputs of flip-flops D634
(pins 1 and 131, which make the D632 outputs (pins 8 and 11) alternately H and L.
With ADD selected, D632 outputs 8 and 11 are both a t H level.
Channel A and B signals are selected via pins 10 and 11 of D631, and are added in
integrated circuit 0631.
Vertical channels A, B and TRIG VIEW are displayed, the switching between these
channels is being determined by the chopper oscillator. The choppper frequency is
applied to the clock inputs of flip-flops D634 (pins
The outputs of D832 (pins 8, 11, 3) are alternately H and L, controlled by the clock
frequency (see Fig. 2.4.).
'0'
i s 0 V (L).
the base of V632, which conducts and discharges
to
D633-9 i s overruled.
a t
1
and 13).
2-1 I