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Schematic Diagrams
RTC/PLU/CLK/SVID
D
Sheet 7 of 31
RTC/PLU/CLK/SVID
C
B
A
B - 8 RTC/PLU/CLK/SVID
5
4
U25H
R46
PMC_I2C_SCL
R48
PMC_I2C_SDA
L48
PMC_SPI_CLK
N48
PMC_SPI_FS0
N44
PMC_SPI_FS1
L49
PMC_SPI_FS2
L51
PMC_SPI_RXD
N49
PMC_SPI_TXD
D54
R398
*0402_short
[17,18,19,21,22]
BUF_PLT_RST#
PMU_PLTRST
E54
[19]
PW R_BTN#
PMU_PWRBTN
C52
[19]
PMU_SLP_S0#
PMU_SLP_S0
D51
[19,23]
SUSB#_PCH
PMU_SLP_S3
J49
[19,23]
SUSC#_PCH
PMU_SLP_S4
F54
[19]
SUS_PW R_ACK
SUSPWRDNACK
J48
[19]
PMU_BATLOW #
PMU_BATLOW
RST_BTN#
C51
PMU_RSTBTN
G49
[18]
SUSCLK
PMU_SUSCLK
SUS_STAT_N
E52
[19]
SUS_STAT_N
SUS_STAT
D02
F55
[28]
H_CPU_SVIDCLK
SVID0_CLK
G53
[28]
H_CPU_SVIDDAT
SVID0_DATA
H_CPU_SVIDALRT#_R
G54
[28]
H_CPU_SVIDALRT#
SVID0_ALERT_B
R403
220_04
DEBUG_OBS_PORT_A0
D1
DEBUG_PORT_A0
DEBUG_OBS_PORT_A1
D2
DEBUG_PORT_A1
A54
NC2
C54
NC11
SVID Signals
R408 240_1%_04
H_CPU_SVIDDAT
1.05VS
H_CPU_SVIDALRT#
R411
68_04
CAD Note: the PU resistors close to CPU
3.3VA
R144
SUS_STAT_N
100K_04
SUS_PW R_ACK
R400
*10K_04
R395
BUF_PLT_RST#
*10K_04
R393
*100K_04
R468
PMU_SLP_S0#
*100K_04
D02 ADD R468
3.3VA
VDD3
PW R_BTN#
R401
1K_04
R467
*1K_04
PMU_BATLOW #
R142
100K_04
D02 ADD R466 ,R467
R466
*100K_04
RST_BTN#
R399
10K_04
R370
*10K_04
SOC_PW ROK
R373
100K_04
5
4
3
B17
OSC_CLK_OUT0
OSC_CLK_OUT_0
C17
OSC_CLK_OUT1
OSC_CLK_OUT_1
U2
OSCIN
iCLK
T1
OSCOUT
D23
RTC_X1
RTC_X1
RTC_X2
F23
RTC_X2
RTC
J23
BVCCRTC_EXTPAD
VCC_RTC_EXTPAD
H25
RTC_INTRUDER
INTRUDER
PMC
D25
SOC_PW ROK
SOC_PWROK
F27
RSM_RST
F25
SRTCRTC#
RTC_TEST
D27
RTCRST#
RTC_RST
J53
THERMTRIP
J54
PROCHOT
AG43
NC3
Thermal
H53
NC15
AG44
NC4
PMU
H55
NC16
A4
NC1
BH1
NC5
TP_SKTOCC_N
SVID
A53
SKTOCC
Spare
F37
NC14
BL2
NC6
BL3
NC7
Misc
BL53
NC8
C2
NC9
C3
NC10
R41
NC17
8 OF 13
1.8VA
R123
C59
1K_04
H_PROCHOT#
SRTCRTC#
C95
Q12
G
[19]
H_PROCHOT_EC
R116
RTCRST#
*100K_04
J10
*OPEN-1mm
[11,18,19,21,22,23,24,25,26,28,29]
VDD3
[9]
VCC_RTC
[21]
RTC_VBAT
[6,8,9,19,22,23,24,26]
3.3VA
[3,4,5,6,8,9,11,17,18,19,22,23,24]
1.8VA
[9,24,26,28]
1.05VS
3
2
1
C319
18p_50V_NPO_04
XTAL_SOC_IN
R362
X1
XTAL_SOC_OUT
200K_04
FSX3M 19.200000M15FAQ
C311
18p_50V_NPO_04
C323
18p_50V_NPO_04
R364
X2
D02 FOR
X5R
10M_04
CM315D_32.768KHZ
C96
0.1u_10V_X5R_04
C320
R101
330K_04
VCC_RTC
R369
*0_04
PM_PW ROK
[19,28]
18p_50V_NPO_04
R366
0_04
DELAY_ALL_SYS_PW RGD
[19]
RSMRST#
[23]
R128
100K_04
PMIC_THERMTRIP_N
[11]
H_PROCHOT#
[28]
VCC_RTC
VDD3
A
1
1u_6.3V_X5R_04
3
C
A
2
R96
1K_04
RTC_VBAT
D5
R98
BAT54CS3
20K_1%_04
C78
1u_6.3V_X5R_04
R97
20K_1%_04
C77
1u_6.3V_X5R_04
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[07] RTC/PLU/CLK/SVID
[07] RTC/PLU/CLK/SVID
[07] RTC/PLU/CLK/SVID
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
6-71-W51G0-D02
6-71-W51G0-D02
6-71-W51G0-D02
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date:
Date:
Date:
Tuesday, January 30, 2018
Tuesday, January 30, 2018
Tuesday, January 30, 2018
Sheet
Sheet
Sheet
7
7
7
of
of
of
35
35
35
2
1
D
C
B
A
3.0
3.0
3.0
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