Pioneer DVR-5100H-S Service Manual page 126

(6) External ROM connection pins
(a) Flash ROM interface pins
External ROM data bus
Es ohtall D [15:0] VO | Data bus in the external ROM access.
Process of pull-up or pull down is necessary.
175, 174, 172, External ROM address bus
171, 169-167, | A[17: 1] Address bus in the external ROM access.
165-156 Can addressing the 256k byte space.
ROM read
Strobe signal which shows a read cycle for external ROM.
It becomes the inactive in the idle state.
ROM write
Strobe signal which shows a write cycle for external ROM.
| No. |
151
Serial transmit data output of clock-synchronous system serial interface (CSI)
Serial receive data input of clock-synchronous system serial interface (CS!)
Clock output of clock-synchronous system serial interface (CSI)
Chip select output of clock-synchronous system serial interface (CSI)
(7) Clock and reset pins
| No. | PinName | vO |
1 RESETB i.
202 HS_CLK E
Reset
RESETB input is asynchronous input. When a signal of fixed low-level width is input
without relation to an operation clock, take precedence of all operation, and reset the
system. Note: RESETB is low-active.
Host clock
Clock input pin which is supplied to CPU core and built-in peripheral I/O.
Please input 27 MHz clock. Perform 2 multiply with internal PLL by 27 MHz clock, 54
MHz clock is supplied to CPU core and internal peripheral 1/O.
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