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¢ Control Pins
Power class set input
This pin status will be loaded to Pwr_class bit which allocated to PHY register 4H.
IEEE1394a-2000 chapter [4.3.4.1]
Configuration manager capable setting
This pin status will be loaded to Contender bit which allocated to PHY register 4H.
0 : Non contender
1 : Contender
Power on reset input
Connect to GND through a 0.1 uF capacitor.
0: Reset
1: Normal
Speed select (UPD72852GB)
0 : MAX. S200
1: MAX. S400
BIAS Detected output (Logical Inverse)
0 : BIAS is coming from some port.
1 : BIAS is not coming from any port.
eee
Ce
|
FNSel = 0
61
|SPD/BDB
0
FNSel = 1
IC
| No. | PinName_
| VO |
Internally Connected (Low Clamped)
IC (AL)
hae Connected to GND.
IC (DL)
internally Connected (Low Clamped)
Connected to GND.
¢ Power Supply Pins
No,
| PinName [WO]
——Funeton
SSCS
—aemia0a7se [Avo
| "[AragpomerSCCi'"'"S*SCSCSCSCSCSCSC~*d
Fags 36, 4,48,52,85 [AGN
| [AneogGNDOSOSCSC"~S*S~"'"'"'<ST
P-« 10, 20,85,60 [ove
alvin
SSCS
[316.2167 [oand | Jowaiens—SSOSCSCSCSCSCSCSSTSCCC~*Y
¢ Other Pins
No. | PinName |VO|
SS
——~—~—~Feunctticmn
44
Een Port 0 twisted pair output
;
48
em
Port 1 twisted pair output
Resistor connection pin 1 for reference current generator
Please connect to GND pin through the 9.1 kQ resistor.
TpBias1
34
23
22
Crystal oscillator connection XI
Crystal oscillator connection XO
Function Select
0: #61 acts as SPD (UPD72852GB compliant)
1:#61 acts as BDB
62
120
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