Logic Analyzer Connector J18 Pin Assignments - Motorola M68MPB916R1 User Manual

MEVB SUPPORT INFORMATION
Table 4-12. Logic Analyzer Connector J18 Pin Assignments
Pin
1 – 4
5
6
7
8
9
10
11
12
13 – 16
17 – 19
20
4-12
Freescale Semiconductor, Inc.
Mnemonic
SPARE No connection
MISO MASTER-IN, SLAVE-OUT – Serial input to SPI in
master mode; serial output from SPI in slave mode.
MOSI MASTER-OUT, SLAVE-IN – Serial output from SPI in
master mode; serial input to SPI in slave mode.
SCK SPI SERIAL CLOCK – In master mode, the clock
signal from the SPI; in slave mode the clock signal to
the SPI.
SS SLAVE SELECT – Bi-directional, active-low signal
that puts the SPI in slave mode.
RXDB RECEIVE DATA B – Serial data input line to serial
communication interface B.
TXDB TRANSMIT DATA B– Serial data output line to serial
communication interface B.
RXDA RECEIVE DATA A – Serial data input line to serial
communication interface A.
TXDA TRANSMIT DATA A – Serial data output line to serial
communication interface A.
GND GROUND
SPARE No connection
GND GROUND
For More Information On This Product,
Go to: www.freescale.com
Signal
M68MPB16R1UM/D