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EVM Overview
1
EVM Overview
1.1
Features
• Full-featured evaluation board for the high-speed ADS8481 18-bit, 1-MSPS, single-channel, parallel
interface, SAR-type analog-to-digital converters
• Onboard signal conditioning
• Onboard reference
• Input and output digital buffers
• Onboard decoding for stacking multiple EVMs
2
Introduction
The ADS8481 is 18-bit, 1-MSPS analog-to-digital converter (ADC) with an internal 4.096-V reference and
a pseudo-differential unipolar single-ended input. The device is a capacitor-based successive
approximation register (SAR) converter with an inherent sample and hold. The ADS8481 has 8-bit, 16-bit,
and 18-bit parallel interface bus options, allowing easy interfacing to a variety of processors.
The ADS8481EVM is an evaluation and demonstration platform for the ADS8481 ADC. The EVM board
design is such that it allows the user to modify the circuits and create custom analog signal conditioning,
select from reference sources and interface modes.
3
Analog Interface
The ADS8481 analog-to-digital converter has both a positive and negative analog input pin. The
ADS8481EVM allows grounding the negative input pin close to the device via SJP9, shorting across the
footprint of C47, or wiring in a signal separately. The negative input pin, which has a range of –200 mV up
to 200 mV, is shorted to ground on the ADS8481EVM via SJP9. A signal for the positive input pin can be
applied at connector P1 pin 2 (shown in
Description
Not connected
Reserved
Reserved
Reserved
Pin tied to ground
Pin tied to ground
Reserved
Pin tied to ground
Pin tied to ground
3.1
Input Signal Conditioning
The analog input circuitry consisting of the THS4031 (U6) operational amplifier, allows the user to install
passive components to configure it for positive or negative gains, as well as input range scaling, filtering,
and leveling translation( e.g., adding a DC offset). The installed amplifier is housed in an industry standard
SOIC footprint. This enables the user to replace the THS4031 with a multitude of dual- and single-supply
amplifiers housed in an SOIC package. When choosing the driver amplifier, the user should consider the
following requirements. The driving amplifier must be able to settle the output to an 18-bit level
(0.00038%) within the sample time of the converter. It needs to have a THD performance comparable or
better than the ADS8481. Lastly, the noise generated by the amplifier needs to be as low as possible, so
as not to degrade the SNR performance of the ADS8481.
2
ADS8481EVM
Table
1) or by the center pin of SMA connector J1.
Table 1. Analog Input Connector
Signal Name
Connector Pin No.
–
P1.1
N/A
P1.3
N/A
P1.5
N/A
P1.7
AGND
P1.9
AGND
P1.11
N/A
P1.13
AGND
P1.15
AGND
P1.17
N/A
P1.19
Signal Name
P1.2
+
P1.4
N/A
P1.6
N/A
P1.8
N/A
P1.10
N/A
P1.12
N/A
P1.14
N/A
P1.16
N/A
P1.18
N/A
P1.20
REF+
SLAU182A – June 2006 – Revised September 2006
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Description
Non-inverting input channel
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
External reference input
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