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This user guide describes the characteristics, operation, and use of the ADS8472 16-bit, 1MHz parallel
interface analog-to-digital converter evaluation board. A complete circuit description as well as schematic
diagram and bill of materials is included.
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ADS8472EVM Schematic
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Input Buffer, Bipolar Fully Differential Input
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Analog Input Connector
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Analog Circuitry Jumper Configurations
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Pinout for Parallel Control Connector P3
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Jumper Settings
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Data Bus Connector P2
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TSW1100 Connector
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Pin out for Converter Control Connector, J6
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Power Supply Test Points
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Power Connector, J5, Pin Out
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Bill of Materials
SLAU203 - February 2007
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Contents
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List of Tables
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User's Guide
SLAU203 - February 2007
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Summary of Contents for Texas Instruments ADS8472EVM

  • Page 1: Table Of Contents

    ....................... EVM Overview ........................Introduction ......................Analog Interface ......................Digital Interface ......................Power Supplies ....................Using the ADS8472EVM ......................ADS8472EVM BoM ..................... ADS8472EVM Layout ....................ADS8472EVM Schematic List of Figures ................Input Buffer, Bipolar Fully Differential Input ....................... Top – Layer 1 ....................
  • Page 2: Evm Overview

    • On board decoding for stacking multiple EVMs. Related Documentation from Texas Instruments To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response Center at (800) 477-8924 or the Product Information Center (PIC) at (972) 644-5580. When ordering, identify this booklet by its title and literature number.
  • Page 3 The necessary DC component to offset the signal at U7 is generated by U4. U4 is the low noise THS4032 amplifier. It can be configured to further filter the reference voltage IC, U2, and provide positive or negative gains. The ADS8472EVM leaves the factory with potentiometer, R24, set to 2.048V and set as shown in Figure...
  • Page 4 The ADS8472 can operate with an external reference voltage in the range of 3.0V up to 4.2V. It generates an on-chip 4.096V reference voltage. The ADS8472EVM allows the user to select the external reference voltage from three sources. The first option is to use the internally generated 4.096V from the ADC. The other two options are to select from the on board reference (U1) or a user supplied voltage applied at pin 20 of P1.
  • Page 5: Digital Interface

    The default configuration is to use the internal on-chip reference. Digital Interface The ADS8472EVM is designed for easy interfacing to multiple platforms. The digital interface input and output signals of the converter are on connectors P2, P3, J6 and J7. These are 0.1" on-centers, plug and socket connectors, allowing the user to plug the ADS8472EVM onto the various motherboard interface cards from Texas Instruments, or ribbon cable onto the user development board.
  • Page 6 In addition to interfacing to the various micro controller and digital signal processors from Texas Instruments, this board also plugs into the TSW1100 card. The TSW1100 is a PC-based data capture card. J7 connector is installed to allow the user to plug the ADS8472EVM directly and collect data for analysis.
  • Page 7: Power Supplies

    +3.3VD as the source for the digital buffer voltage supply (+BVDD). Table 9. Power Connector, J5, Pin Out Signal Power Connector – J5 Signal +VA(+6V) –VA (-6V) +5VA DGND AGND +3.3VD +5VD SLAU203 – February 2007 ADS8472EVM Submit Documentation Feedback...
  • Page 8: Using The Ads8472Evm

    CONVST pulse to begin digitizing the signal. Therefore, the user must provide a CONVST to the ADS8472 at P3 pin 17 or at J6 pin 5 on the ADS8472EVM. In this case, it is recommended the ADS8472 be operated in the CS and RD tied low mode, as this requires only CONVST to toggle. To short this signals to ground, simply short across pins 1 and 2, and 3 and 4 of J6, respectively.
  • Page 9 5-6K interface board. The 5-6K interface board sits on the C5000 and C6000 digital signal processor starter kits (DSK). The ADS8472EVM is mapped then into the processor’s memory space. The 5-6k interface board also provides an area for signal conditioning. This area can be used to install application circuit(s) for digitization by the ADS8472 analog-to-digital converter.
  • Page 10: Ads8472Evm Bom

    ADS8472EVM BoM www.ti.com ADS8472EVM BoM The following table contains a complete Bill of Materials for the ADS8472EVM. The schematic diagram is also provided for reference. Contact the Product Information Center or e-mail dataconvapps@list.ti.com for questions regarding this EVM. Table 10. Bill of Materials...
  • Page 11 ADS8472EVM BoM www.ti.com Table 10. Bill of Materials (continued) Value REF DES Footprint MFG Part No. Description 1µF C41 C42 C2012X7R1E105K CAP CER 1.0µF 25V X7R 0805 T/R Corporation or Alternate 2.2µF C20–C27 C1608X5R1A225MT CAP CER 2.2µF 6.3V X5R 20% 0603...
  • Page 12: Ads8472Evm Layout

    ADS8472EVM Layout www.ti.com Table 10. Bill of Materials (continued) Value REF DES Footprint MFG Part No. Description 3POS_JU W1–W4 W6 3pos_jump Samtec TSW-103-07-L-S 3 Position Jumper _ 0.1" spacing MPER 2POS_JU 2pos_jump Samtec TSW-102-07-L-S 2 Position Jumper _ 0.1" spacing MPER TP_0.025...
  • Page 13: Ground Plane - Layer

    ADS8472EVM Layout www.ti.com Figure 3. Ground Plane – Layer 2 Figure 4. Power Plane – Layer 3 SLAU203 – February 2007 ADS8472EVM Submit Documentation Feedback...
  • Page 14: Bottom - Layer

    ADS8472EVM Layout www.ti.com Figure 5. Bottom – Layer 4 Figure 6. Top Overlay ADS8472EVM SLAU203 – February 2007 Submit Documentation Feedback...
  • Page 15: Bottom Overlay

    ADS8472EVM Schematic www.ti.com Figure 7. Bottom OverLay ADS8472EVM Schematic Schematic diagram pages are appended to this user's guide. SLAU203 – February 2007 ADS8472EVM Submit Documentation Feedback...
  • Page 16 B_DB6 B_DB5 B_DB4 B_DB3 B_DB2 DC_CONVST 40-PIN Header INTC TSW1100 Connector Parallel Control 12500 TI Boulevard. Dallas, Texas 75243 TITLE: ADS8471/ADS8472EVM Block Diagram Engineer: Lijoy Philipose DOCUMENT CONTROL #: REV: 6485904 Drawn By: Lijoy Philipose FILE: BlockDiagram.sch DATE: 31-Jan-2009 SIZE:...
  • Page 17 Revision History **VRE4141** ECN Number Approved +5VCC EXT_REF +VIN VREF SJP1 49.9 22uF GND_F OUT_F GND_F OUT_F GND_S OUT_S 0.47uF GND_S OUT_S ENABLE 0.47uF ENABLE +5VCC REF3230 +5VCC +5VCC +5VCC REF3240 B_CS B_CS B_RD 2.2uF B_RD B_CONVST 2.2uF B_CONVST B_BYTE R24 10K B_BYTE B_BUS18/16...
  • Page 18 Revision History TP11 ECN Number Approved +VCC +5VCC +AVCC MMZ2012R601A MMZ2012R601A 10uF 1000pF 10uF 1000pF 10uF 10uF TP10 TP13 +VBD +BVDD MMZ2012R601A 10uF 1000pF 1000pF 10uF 10uF 10uF TP12 TP14 MMZ2012R601A -VCC +VBD +VBD 0.1uF +VBD DB[17...0] DB[17...0] DB10 B_DB10 DB11 B_DB11 +VBD...
  • Page 19 EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
  • Page 20 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

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