Indirect Addressing - IBM 1620 1 Manual

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The Indirect Addressing special feature saves pro-
gram steps and computer time by providing a direct
method of address modification. Its primary use is in
programs where multiple instructions have the same
address, and this address is to be modified by the
program. Indirect Addressing may also be used for
linking
subroutines~
Description
Normally, the P or
Q
address of an instruction is the
location of the data used during execution of the
instruction. An indirect address, however, is the
address of a second address instead of the address of
data. This "second address" is the core storage ad-'
dress of the data to be used unless the second address
is yet another indirect address. In effect, the address
at the indirect address location is a subsitute for the
address of the instruction.
The data field specified by the indirect address is
always five digits in length. The upper digit of the
address does not require a flag bit to define the field.
Indirect Addressing
Moreover, its length is always five digits, even though
flag bits exist within the field.
The P or Q address of an instruction is indirect
when a flag bit is over the units position. Figure 7
shows that (1) the instruction (21 00500 00650) has
an indirect P address of 00500, (2) the data at 00500
is 00780, which is used as the P address during execu-
tion of the instruction, and ( 3 ) the instruction
(21 00500 00650) is not altered in core storage; only
the instruction register of the 1620 is changed.
The data at the location specified by the indirect
address is also an indirect address if a flag bit exists
in the units position. This chaining effect continues
until a flag bit does not exist in the units position
of the address. The address is then treated as a direct
address.
Any P or Q address of an instruction that specifies
the location
Of
data can be an indirect address. See
Table 1 in the next section of this manual. When
the P address of an immediate inst:t:uction is an indirect
address, the Q data cannot be more than six digits in
CORE STORAGE
( 1) Instruction with Indirect P Address
(2) The data (00780) at the indirect
address is substituted as the new P
address in the instruction.
(3) The resultant instruction is executed
normally with the New P Address.
Figure 7.
Indirect Addressing Data Flow
OP
.~
L
9

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