Kenwood DPC-77 Service Manual page 30

DPC-77
CIRCUIT DESCRIPTION
Register E — CLV mode
It is as shown in Table 1.
The details of each mode will be described in ''6. CLV servo
control'. (Page 37)
D3 to DO are all ''O'' when XRST =L.
Register Command Address Data
name D7 ~D4 D3 D2 D1 SENS pin
g*t New function control 1001 i ZCMT HZPD NCLV Z
+
Counter set, More —
significant 4-bit
Tc7 Tc6
Tc5
COUNT
CLV control DIV Ts Te Z
CLV mode CLV mode PW 264
*1 Register 9
ZCMT Zero-cross MUTE off Zero-cross MUTE on
HZPD PDO pin is always active. PDO pin is ''2'' at the trailing edge of GFS.
NCLV D1 CLV-P servo for the frame sync signal CLV-P servo for the base counter
CRCQ CRCF is not superimposed on SUBQ SUBQ = CRCF at the raising edge of SCOR
*2 Register A *3 Register D
ee a ae
0) 1 4
8
13
0 | RFCK/4, WFCK/4
RFCK/8, WFCK/8
RFCK/32
RFCK/16
RFCK/4
RFCK/2
—12 dB
O dB
Phase comparison frequency in CLV-P mode
———————}
Bottom hold period in CLV-S, CLV-H mode
1 0
Peak hoid frequency in CLV-S mode
Gain at MDP pin in CLV-S, CLV-H mode
*4 Register E
CLV-S
CLV-H
CLv-P CLV-P
CLV-S or CLV-P [Zor CLV-P
Z: High impedance
Table 1 List of registers
32