National Instruments NI cDAQ-9139 User Manual page 74

Eight-slot controller
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Chapter 4
Digital Input/Output and PFI
on N consecutive edges, the low-to-high transition is propagated to the rest of the circuit. The
value of N depends on the filter setting, as shown in Table 4-1.
Filter
Setting
112.5 ns
(short)
6.4 μs
(medium)
2.56 ms
(high)
Custom
User-configurable
*
Pulse widths are nominal values; the accuracy of the controller timebase and I/O distortion will affect
these values.
On powerup, the filters are disabled. Figure 4-7 shows an example of a low-to-high transition on
an input that has a custom filter set to N = 5.
PFI Terminal
Filter Clock
Filtered Input
4-14 | ni.com
Table 4-1. Selectable PFI Filter Settings
Filter Clock
80 MHz
80 MHz
100 kHz
Figure 4-7. PFI Filter Example
1
1
2
3
Min Pulse
Width
Jitter
Pass
12.5 ns
112.5 ns
12.5 ns
6.4 μs
10 μs
2.56 ms
1 Filter
T
user
Clock
period
4
1
2
3
4
*
to
Max Pulse Width
to Not Pass
100 ns
6.3875 μs
2.55 ms
- (1 Filter Clock
T
user
period)
Filtered input goes
high when terminal
5
is sampled high on
five consecutive filter
clocks.
*

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