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National Instruments NI cDAQTM-9138 User Manual

National Instruments NI cDAQTM-9138 User Manual

Eight-slot stand-alone chassis with integrated controller
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NI cDAQ
-9138/9139
User Manual
NI CompactDAQ cDAQ-9138/9139 Eight-Slot Stand-Alone
Chassis with Integrated Controller
NI cDAQ-9138/9139 User Manual
June 2014
371042C-01

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  • Page 1 NI cDAQ -9138/9139 User Manual NI CompactDAQ cDAQ-9138/9139 Eight-Slot Stand-Alone Chassis with Integrated Controller NI cDAQ-9138/9139 User Manual June 2014 371042C-01...
  • Page 2 11500 North Mopac Expressway Austin, Texas 78759-3504 USA Tel: 512 683 0100 For further support information, refer to the NI Services appendix. To comment on National Instruments documentation, refer to the National Instruments Web site at ni.com/info enter the Info Code feedback...
  • Page 3 National Instruments Corporation. National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.
  • Page 4 ™ The ExpressCard word mark and logos are owned by PCMCIA and any use of such marks by National Instruments is under license. The mark LabWindows is used under a license from Microsoft Corporation. Windows is a registered trademark of Microsoft Corporation in the United States and other countries.

  • Page 5: Table Of Contents

    Cables and Accessories ....................1-35 Using the cDAQ Chassis ....................1-37 C Series I/O Module ....................1-37 Parallel versus Serial DIO Modules ..............1-37 cDAQ Module Interface ................... 1-38 STC3......................... 1-38 Processor and Ports....................1-39 © National Instruments | v...
  • Page 6 Contents Chapter 2 Analog Input Analog Input Triggering Signals ..................2-1 Analog Input Timing Signals.................... 2-1 AI Sample Clock Signal ...................2-2 Routing the Sample Clock to an Output Terminal ........... 2-2 AI Sample Clock Timebase Signal ................2-2 AI Convert Clock Signal Behavior For Analog Input Modules ....... 2-2 Scanned Modules....................
  • Page 7 Single Pulse-Width Measurement ..............5-5 Implicit Buffered Pulse-Width Measurement........... 5-6 Sample Clocked Buffered Pulse-Width Measurement ........5-6 Pulse Measurement....................5-7 Single Pulse Measurement................5-7 Implicit Buffered Pulse Measurement.............. 5-7 Sample Clocked Buffered Pulse Measurement ..........5-8 © National Instruments | vii...
  • Page 8 Contents Semi-Period Measurement..................5-8 Single Semi-Period Measurement ..............5-9 Implicit Buffered Semi-Period Measurement...........5-9 Pulse versus Semi-Period Measurements ............5-10 Frequency Measurement...................5-10 Low Frequency with One Counter..............5-11 High Frequency with Two Counters..............5-12 Large Range of Frequencies with Two Counters ..........5-13 Sample Clocked Buffered Frequency Measurement ........
  • Page 9 Clock Routing........................6-1 80 MHz Timebase ....................6-2 20 MHz Timebase ....................6-2 100 kHz Timebase ....................6-2 Appendix A Controller Operating System and Configuration Appendix B Where to Go from Here Appendix C NI Services Index © National Instruments | ix...

  • Page 10: Getting Started With The Cdaq Chassis

    Chassis The National Instruments CompactDAQ cDAQ-9138 stand-alone chassis with integrated controller features the 1.06 GHz Celeron processor. The National Instruments CompactDAQ cDAQ-9139 stand-alone chassis with integrated controller features the 1.33 GHz Intel Core i7 processor. The NI cDAQ-9138 and NI cDAQ-9139 are available as a Windows Embedded Standard 7 (WES7) or a LabVIEW Real-Time system.

  • Page 11: Safety Guidelines

    Product misuse can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair. Because some C Series I/O modules may have more stringent certification...

  • Page 12: Safety Guidelines For Hazardous Locations

    IP 54 as defined in IEC/EN 60529 and used in an environment of not more than Pollution Degree 2. The enclosure must have a door or cover accessible only by the use of a Caution tool. © National Instruments | 1-3...

  • Page 13: Electromagnetic Compatibility Guidelines

    Furthermore, any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.

  • Page 14: Unpacking

    Return Material Authorization (RMA) process or contact an Cd/Hg/Pb authorized National Instruments service representative. For more information about compliance with the EU Battery Directive 2006/66/EC about Batteries and Accumulators and Waste Batteries and Accumulators, visit ni.com/...
  • Page 15 The NI-DAQmx driver software preloaded onto your cDAQ chassis is available for download . The documentation for NI-DAQmx is available from Start»All ni.com/support Programs»National Instruments»NI-DAQ. Other NI documentation is available from ni.com/manuals Refer to Figure 1-1 while completing the following assembly steps.
  • Page 16 Windows operating system. Refer to the DIP Switches section for more information about the DISABLE RT DIP switch. Figure 1-3. DISABLE RT DIP Switch in ON Position DISABLE RT SAFE MODE CONSOLE OUT IP RESET NO APP USER1 © National Instruments | 1-7...
  • Page 17 Chapter 1 Getting Started with the cDAQ Chassis Wire your external power source as outlined in the Wiring Power to the cDAQ Chassis section. The cDAQ chassis requires an external power supply that meets the specifications listed in the specifications document for your cDAQ chassis. 10.

  • Page 18: Installing The Ni Cdaq-9138/9139 For Labview Real-Time

    The NI-DAQmx driver software is included on the disk shipped with your kit and is available for download at . The documentation for NI-DAQmx is available after ni.com/support installation from Start»All Programs»National Instruments»NI-DAQ. Other NI documentation is available from ni.com/manuals Power on the host computer and connect it to an Ethernet network.
  • Page 19 Chapter 1 Getting Started with the cDAQ Chassis If you use shielded cabling to connect to a C Series I/O module with a plastic Note connector, you must attach the cable shield to the chassis grounding terminal using 1.31 mm (16 AWG) or larger wire.
  • Page 20 Interfaces. Right-click NI cDAQ-<model number> and select Self-Test. Self-test performs a brief test to determine successful chassis installation. The serial number listed in MAX is the last eight digits of the cDAQ chassis primary MAC address. © National Instruments | 1-11...

  • Page 21: Troubleshooting Network Communication In Ni Cdaq-9138/9139 For Labview Real-Time Chassis

    Chapter 1 Getting Started with the cDAQ Chassis 23. Run a Test Panel in MAX by expanding NI-cDAQ<model number>-<serial number>» Devices and Interfaces»NI cDAQ-<model number>, right-clicking your C Series module, and selecting Test Panels to open a test panel for the selected module. If the test panel displays an error message, refer to ni.com/support New users can view and use the Voltage - Continuous Input VI, available in the...

  • Page 22: Wiring Power To The Cdaq Chassis

    Loosen the connector screws and remove the power screw terminal connector plug from the cDAQ chassis. Figure 1-8 shows the terminal screws, which secure the wires in the screw terminals, and the connector screws, which secure the connector plug on the front panel. © National Instruments | 1-13...
  • Page 23 Chapter 1 Getting Started with the cDAQ Chassis Figure 1-8. Power Screw Terminal Connector Plug Connector Screws Terminal Screw Do not tighten or loosen the terminal screws on the power connector while Caution the power is on. Connect the positive lead of the primary power source to the V1 terminal of the power connector plug and tighten the terminal screw to 0.5 N ·...

  • Page 24: Mounting The Cdaq Chassis

    For more information about how different mounting configurations can cause temperature derating, go to and enter the Info Code ni.com/info cdaqmounting Figure 1-9. NI cDAQ-9138/9139 Mounted Horizontally with Panel Mount Kit NI cDAQ-9139 NI CompactDAQ © National Instruments | 1-15...
  • Page 25 Chapter 1 Getting Started with the cDAQ Chassis Figure 1-10. NI cDAQ-9138/9139 Temperature, Cooling, and Cabling Dimensions Cooling Outline 50.8 mm (2.00 in.) 88.1 mm (3.47 in.) Cooling Outline 50.8 mm (2.00 in.) Cabling Clearance 50.8 mm (2.00 in.) 50.8 mm 29.2 mm (2.00 in.) (1.15 in.)

  • Page 26: Using The Cdaq Chassis On A Desktop

    To achieve the highest accuracy when mounting the chassis in the desktop kit, Note NI recommends that you operate the chassis with the modules rotated forward, as shown in Figure 1-11. Visit and enter the Info Code ni.com/info cdaqmounting for more information about mounting and accuracy. © National Instruments | 1-17...
  • Page 27 Chapter 1 Getting Started with the cDAQ Chassis Figure 1-12 shows the dimensions of a chassis after the desktop mounting kit is installed. Figure 1-12. Dimensions of the cDAQ Chassis with Desktop Mounting Kit Installed 28.2 mm 28.1 mm (1.11 in.) (1.11 in.) NI cDAQ-9139 NI CompactDAQ...

  • Page 28: Mounting The Cdaq Chassis On A Panel

    Fasten the mounting plate to the chassis using a number 2 Phillips screwdriver and six M4 × 10 screws. National Instruments provides these screws with the panel mount kit. Tighten the screws to a maximum torque of 1.3 N · m (11.5 lb · in.).

  • Page 29: Mounting The Cdaq Chassis On A Din Rail

    Fasten the DIN rail clip to the chassis using a number 2 Phillips screwdriver and three M4 × 10 screws. National Instruments provides these screws with the DIN rail mount kit. Tighten the screws to a maximum torque of 1.3 N · m (11.5 lb · in.). Make sure the DIN rail kit is installed as shown in Figure 1-16, with the larger lip of the DIN clip positioned 1-20 | ni.com...

  • Page 30: Removing I/O Modules From The Cdaq Chassis

    Make sure that no I/O-side power is connected to the I/O module. If the chassis is in a nonhazardous location, the chassis power can be on when you remove I/O modules. Squeeze the latches on both sides of the module and pull the module out of the chassis. © National Instruments | 1-21...

  • Page 31: Ni Cdaq Chassis Features

    Chapter 1 Getting Started with the cDAQ Chassis NI cDAQ Chassis Features The cDAQ chassis features many ports, DIP switches, LEDs, a RESET button, and a power button. Refer to Figure 1-1 for the locations of these features on the cDAQ chassis. Video (VGA) Port The cDAQ chassis video (VGA) port, shown in Figure 1-1, outputs graphics using VESA standard VGA analog signaling.

  • Page 32: Usb Ports

    The cDAQ chassis has two tri-speed RJ-45 Ethernet ports, shown in Figure 1-1. Refer to Figure 1-18 for Ethernet pin locations and signal descriptions. The Ethernet signal names are listed as Fast Ethernet signal name, RX/TX +/-, and then Gigabit Ethernet signal name, (RX/TX_x+/-). © National Instruments | 1-23...

  • Page 33: Ethernet Leds

    Chapter 1 Getting Started with the cDAQ Chassis Figure 1-18. Ethernet Port Pin Locations: Fast Ethernet Signals (Gigabit Ethernet Signals) 1 TX+ (TX_A+) 2 TX– (TX_A–) 3 RX+ (RX_B+) 4 No Connect (TX_C+) 5 No Connect (TX_C–) 6 RX– (RX_B–) 7 No Connect (RX_D+) 8 No Connect (RX_D–) Both Ethernet ports perform automatic crossover configuration so you do not...

  • Page 34: Ethernet Cabling

    Table 1-6 shows the shielded Ethernet cable wiring connections for both straight through and crossover cables. Table 1-6. Ethernet Cable Wiring Connections Connector 2 Connector 1 Straight Through Crossover white/orange white/orange white/green orange orange green white/green white/green white/orange blue blue blue white/blue white/blue white/blue © National Instruments | 1-25...

  • Page 35: Rs-232 Serial Port

    Chapter 1 Getting Started with the cDAQ Chassis Table 1-6. Ethernet Cable Wiring Connections (Continued) Connector 2 Connector 1 Straight Through Crossover green green orange white/brown white/brown white/brown brown brown brown Connector 1 Connector 2 Pin 1 Pin 8 Pin 1 Pin 8 RS-232 Serial Port The cDAQ chassis has an RS-232 serial port, shown in Figure 1-1, to which you can connect...

  • Page 36: Rs-485/422 Serial Port

    Make sure the MXI-Express device is configured and powered off. Make sure the cDAQ chassis is powered off. Connect the cDAQ chassis to the MXI-Express device using a x1 cable. Refer to Table 1-9 for MXI-Express cable lengths and part numbers. © National Instruments | 1-27...

  • Page 37: Dip Switches

    Chapter 1 Getting Started with the cDAQ Chassis Power on the MXI-Express device. Power on the cDAQ chassis. The MXI-Express port has one LINK LED. Refer to Table 1-8 for information about the MXI-Express LINK LED behavior. Do not connect MXI-Express devices to the cDAQ chassis while the chassis Note is powered on.
  • Page 38 Keep the SAFE MODE switch in the OFF position during normal operation. NI recommends that you keep the (NI cDAQ-9138/9139 for Windows) SAFE MODE switch in the OFF position at all times. © National Instruments | 1-29...
  • Page 39 Chapter 1 Getting Started with the cDAQ Chassis Table 1-7. DIP Switches (Continued) Switch Description CONSOLE The position of the (NI cDAQ-9138/9139 for LabVIEW Real-Time) CONSOLE OUT switch determines whether console input and output are redirected to the RS-232 serial port. If the switch is in the ON position, console input and output are redirected to the RS-232 serial port.

  • Page 40: Reset Button

    4 seconds. Refer to the Power/Wake Configuration Submenu section of Appendix A, Controller Operating System and Configuration, for information about configuring how the chassis responds to the power button. © National Instruments | 1-31...

  • Page 41: Leds

    Chapter 1 Getting Started with the cDAQ Chassis LEDs The cDAQ chassis features four LEDs—POWER, DRIVE, STATUS, and USER1—on its front panel, two LEDs—ACT/LINK and 10/100/1000—near each Ethernet connector, and one LINK LED near the MXI-Express port. Refer to Figure 1-1 for the locations of the LEDs. Table 1-8 lists the LEDs and status indications.
  • Page 42 Modify the VI as necessary to solve the memory usage issue. Continuously Software error—The chassis has detected an flashing unrecoverable error. Contact National Instruments. Continuously Software error—The device may be configured for flashing or DHCP but unable to get an IP address because of a solid problem with the DHCP server.

  • Page 43: Cmos Battery And Cmos Reset Button

    Check front-panel I/O, CXM, and C Series module connections for shorts. Remove any shorts and power cycle the controller. If the problem persists, contact National Instruments. Solid Hardware error—The cDAQ chassis internal temperature has exceeded a critical threshold.

  • Page 44: Chassis Grounding Screw

    (24 VDC, 5 A, 100-120/200-240 VAC input) NI desktop mount kit 781988-01 NI panel mount kit 781919-01 NI DIN rail mount kit 781987-01 NI rack mount kit with DIN rail 781989-01 NI 9910 sliding rack mount kit with DIN rail 779102-01 © National Instruments | 1-35...
  • Page 45 Chapter 1 Getting Started with the cDAQ Chassis Table 1-9. Cables and Accessories (Continued) Accessory Part Number CAT-5E Ethernet cable, shielded (2, 5, and 10 m lengths) 151733-02, 151733-05, 151733-10 Industrial USB extension with retention cable (0.5 and 2 m 152166-xx lengths) DIN rail-mountable screw terminal adapter...

  • Page 46: Using The Cdaq Chassis

    MXI Express C Series I/O Module National Instruments C Series I/O modules provide built-in signal conditioning and screw terminal, spring terminal, BNC, D-SUB, or RJ-50 connectors. A wide variety of I/O types are available, allowing you to customize the cDAQ chassis to meet your application needs.

  • Page 47: Cdaq Module Interface

    Chapter 1 Getting Started with the cDAQ Chassis cDAQ Module Interface The cDAQ module interface manages data transfers between the STC3 and the C Series I/O modules. The interface also handles autodetection, signal routing, and synchronization. STC3 The STC3 features independent high-speed data streams; flexible AI, AO, and DIO sample timing;...

  • Page 48: Processor And Ports

    Refer to the specifications document for your cDAQ chassis for information about the processors on the cDAQ chassis. Refer to the NI cDAQ Chassis Features section for information about using the various ports on the cDAQ chassis. © National Instruments | 1-39...

  • Page 49: Analog Input

    Analog Input Timing Signals The cDAQ chassis features the following analog input timing signals: • AI Sample Clock Signal* • AI Sample Clock Timebase Signal • AI Start Trigger Signal* © National Instruments | 2-1...

  • Page 50: Ai Sample Clock Signal

    Chapter 2 Analog Input • AI Reference Trigger Signal* • AI Pause Trigger Signal* Signals with an * support digital filtering. Refer to the PFI Filters section of Chapter 4, Digital Input/Output and PFI, for more information. Refer to the AI Convert Clock Signal Behavior For Analog Input Modules section for AI Convert Clock signals and the cDAQ chassis.

  • Page 51: Scanned Modules

    AI Sample Clock does when a sigma-delta module is not being used. When sigma-delta modules are in an AI task, the chassis automatically issues a synchronization pulse to each sigma-delta modules that resets their ADCs at the same time. Because of the © National Instruments | 2-3...

  • Page 52: Slow Sample Rate Modules

    Chapter 2 Analog Input filtering used in sigma-delta A/D converters, these modules usually exhibit a fixed input delay relative to non-sigma-delta modules in the system. This input delay is specified in the C Series I/O module documentation. Slow Sample Rate Modules Some C Series analog input modules are specifically designed for measuring signals that vary slowly, such as temperature.

  • Page 53: Using A Digital Source

    This data can be accessed (with some limitations) before the cDAQ chassis discards it. Refer to the KnowledgeBase document, Can a Pretriggered Acquisition be Continuous?, for more information. To access this KnowledgeBase, go to and enter the Info Code ni.com/info rdcanq © National Instruments | 2-5...

  • Page 54: Using A Digital Source

    Chapter 2 Analog Input When the reference trigger occurs, the cDAQ chassis continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 2-3 shows the final buffer. Figure 2-3. Reference Trigger Final Buffer Reference Trigger Pretrigger Samples Posttrigger Samples...

  • Page 55: Ai Pause Trigger Signal

    You can use the cDAQ chassis in the following analog input applications: • Single-point acquisition • Finite acquisition • Continuous acquisition For more information about programming analog input applications and triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help for more information. © National Instruments | 2-7...

  • Page 56: Analog Output

    You can configure software-timed generations to simultaneously update • Only one simultaneous update task can run at a time • A hardware-timed AO task and a simultaneous update AO task cannot run at the same time © National Instruments | 3-1...

  • Page 57: Hardware-Timed Generations

    Chapter 3 Analog Output Hardware-Timed Generations With a hardware-timed generation, a digital hardware signal controls the rate of the generation. This signal can be generated internally on the chassis or provided externally. Hardware-timed generations have several advantages over software-timed acquisitions: •...

  • Page 58: Analog Output Triggering Signals

    Figure 3-1. Analog Output Timing Options Analog Comparison Event AO Sample Clock Ctr n Internal Output Analog Comparison AO Sample Clock Event Timebase Programmable 20 MHz Timebase Clock Divider 80 MHz Timebase 100 kHz Timebase © National Instruments | 3-3...

  • Page 59: Routing Ao Sample Clock To An Output Terminal

    Chapter 3 Analog Output Routing AO Sample Clock to an Output Terminal You can route AO Sample Clock to any output PFI terminal. AO Sample Clock is active high by default. AO Sample Clock Timebase Signal The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is divided down to provide a source for AO Sample Clock.

  • Page 60: Ao Pause Trigger Signal

    Help for more information. Using an Analog Source Some C Series I/O modules can generate a trigger based on an analog signal. In NI-DAQmx, this is called the Analog Comparison Event, depending on the trigger properties. © National Instruments | 3-5...

  • Page 61: Minimizing Glitches On The Output Signal

    Chapter 3 Analog Output When you use an analog trigger source, the samples are paused when the Analog Comparison Event signal is at a high or low level, depending on the trigger properties. The analog trigger circuit must be configured by a simultaneously running analog input task. Depending on the C Series I/O module capabilities, you may need Note two modules to utilize analog triggering.

  • Page 62: Digital Input/Output And Pfi

    Each of the DIO lines can be used as a static DI or DO line. You can use static DIO lines to monitor or control digital signals on some C Series I/O modules. Each DIO line can be © National Instruments | 4-1...

  • Page 63: Digital Input

    Chapter 4 Digital Input/Output and PFI individually configured as a digital input (DI) or digital output (DO), if the C Series I/O module being used allows such configuration. All samples of static DI lines and updates of static DO lines are software-timed. Digital Input You can acquire digital waveforms using either parallel or serial digital modules.
  • Page 64 You can route the following signals as DI Sample Clock: • Any PFI terminal • Analog Comparison Event (an analog trigger) You can sample data on the rising or falling edge of DI Sample Clock. © National Instruments | 4-3...
  • Page 65 Chapter 4 Digital Input/Output and PFI Routing DI Sample Clock to an Output Terminal You can route DI Sample Clock to any output PFI terminal. The PFI circuitry inverts the polarity of DI Sample Clock before driving the PFI terminal. DI Start Trigger Signal Use the DI Start Trigger (di/StartTrigger) signal to begin a measurement acquisition.
  • Page 66 When you use an analog trigger source, the acquisition stops on the first rising or falling edge of the Analog Comparison Event signal, depending on the trigger properties. Depending on the C Series I/O module capabilities, you may need Note two modules to utilize analog triggering. © National Instruments | 4-5...

  • Page 67: Digital Input Filters

    Chapter 4 Digital Input/Output and PFI Routing DI Reference Trigger Signal to an Output Terminal You can route DI Reference Trigger to any output PFI terminal. Reference Trigger is active high by default. DI Pause Trigger Signal You can use the DI Pause Trigger (di/PauseTrigger) signal to pause and resume a measurement acquisition.

  • Page 68: Getting Started With Di Applications In Software

    FIFO then transferred to a PC buffer. Buffered acquisitions typically allow for much faster transfer rates than nonbuffered acquisitions because data accumulates and is transferred in blocks, rather than one sample at a time. © National Instruments | 4-7...

  • Page 69: Digital Output

    Chapter 4 Digital Input/Output and PFI Digital Output To generate digital output, insert a digital output C Series I/O module in any slot on the cDAQ chassis. The generation specifications, such as the number of channels, channel configuration, update rate, and output range, are determined by the type of C Series I/O module used. For more information, refer to the documentation included with your C Series I/O module(s).

  • Page 70: Digital Output Triggering Signals

    C Series analog modules can supply an analog trigger. For more information, refer to the documentation included with your C Series I/O module(s). Refer to the DO Start Trigger Signal DO Pause Trigger Signal sections for more information about the digital output trigger signals. © National Instruments | 4-9...

  • Page 71: Digital Output Timing Signals

    Chapter 4 Digital Input/Output and PFI Digital Output Timing Signals The cDAQ chassis features the following DO timing signals: • DO Sample Clock Signal* • DO Sample Clock Timebase Signal • DO Start Trigger Signal* • DO Pause Trigger Signal* Signals with an * support digital filtering.
  • Page 72 If the source of the sample clock is the onboard clock, the generation resumes as soon as the pause trigger is deasserted, as shown in Figure 4-5. Figure 4-5. DO Pause Trigger with the Onboard Clock Source Pause Trigger Sample Clock © National Instruments | 4-11...

  • Page 73: Getting Started With Do Applications In Software

    Chapter 4 Digital Input/Output and PFI If you are using any signal other than the onboard clock as the source of the sample clock, the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received, as shown in Figure 4-6.

  • Page 74: Pfi

    Not Pass 112.5 ns 80 MHz 12.5 ns 112.5 ns 100 ns (short) 6.4 μs 80 MHz 12.5 ns 6.4 μs 6.3875 μs (medium) 2.56 ms 100 kHz 10 μs 2.56 ms 2.55 ms (high) © National Instruments | 4-13...
  • Page 75 Chapter 4 Digital Input/Output and PFI Table 4-1. Selectable PFI Filter Settings (Continued) Min Pulse Filter Width Max Pulse Width Setting Filter Clock Jitter Pass to Not Pass Custom User-configurable 1 Filter - (1 Filter Clock user user Clock period) period Pulse widths are nominal values;...

  • Page 76: Counters

    (Embedded Ctrn) for use in what are traditionally two-counter measurements and generations. The embedded counters cannot be programmed independent of the main counter; signals from the embedded counters are not routable. © National Instruments | 5-1...

  • Page 77: Counter Timing Engine

    Chapter 5 Counters Counter Timing Engine Unlike analog input, analog output, digital input, and digital output, the cDAQ chassis counters do not have the ability to divide down a timebase to produce an internal counter sample clock. For sample clocked operations, an external signal must be provided to supply a clock source. The source can be any of the following signals: •...

  • Page 78: Counter Input Applications

    Source input after the counter is armed. On-demand refers to the fact that software can read the counter contents at any time without disturbing the counting process. Figure 5-2 shows an example of single point edge counting. Figure 5-2. Single Point (On-Demand) Edge Counting Counter Armed SOURCE Counter Value © National Instruments | 5-3...

  • Page 79: Buffered (Sample Clock) Edge Counting

    Chapter 5 Counters You also can use a pause trigger to pause (or gate) the counter. When the pause trigger is active, the counter ignores edges on its Source input. When the pause trigger is inactive, the counter counts edges normally. You can route the pause trigger to the Gate input of the counter.

  • Page 80: Pulse-Width Measurement

    FIFO and ignores other edges on the Gate and Source inputs. Software then reads the stored count. Figure 5-5 shows an example of a single pulse-width measurement. Figure 5-5. Single Pulse-Width Measurement GATE SOURCE Counter Value Latched Value © National Instruments | 5-5...

  • Page 81: Implicit Buffered Pulse-Width Measurement

    Chapter 5 Counters Implicit Buffered Pulse-Width Measurement An implicit buffered pulse-width measurement is similar to single pulse-width measurement, but buffered pulse-width measurement takes measurements over multiple pulses. The counter counts the number of edges on the Source input while the Gate input remains active. On each trailing edge of the Gate signal, the counter stores the count in the counter FIFO.

  • Page 82: Pulse Measurement

    The counter begins counting when it is armed. The arm usually occurs between edges on the Gate input but the counting does not start until the desired edge. You can select whether to read the high pulse or low pulse first using the StartingEdge property in NI-DAQmx. © National Instruments | 5-7...

  • Page 83: Sample Clocked Buffered Pulse Measurement

    Chapter 5 Counters Figure 5-9 shows an example of an implicit buffered pulse measurement. Figure 5-9. Implicit Buffered Pulse Measurement Counter Armed Gate Source Buffer Sample Clocked Buffered Pulse Measurement A sample clocked buffered pulse measurement is similar to single pulse measurement, but a buffered pulse measurement takes measurements over multiple pulses correlated to a sample clock.

  • Page 84: Single Semi-Period Measurement

    Figure 5-11 shows an example of an implicit buffered semi-period measurement. Figure 5-11. Implicit Buffered Semi-Period Measurement Counter Starting Armed Edge GATE SOURCE Counter Value Buffer For information about connecting counter signals, refer to the Default Counter/Timer Routing section. © National Instruments | 5-9...

  • Page 85: Pulse Versus Semi-Period Measurements

    Chapter 5 Counters Pulse versus Semi-Period Measurements In hardware, pulse measurement and semi-period are the same measurement. Both measure the high and low times of a pulse. The functional difference between the two measurements is how the data is returned. In a semi-period measurement, each high or low time is considered one point of data and returned in units of seconds or ticks.

  • Page 86: Low Frequency With One Counter

    You can configure the counter to measure one period of the gate signal. The frequency of fx is the inverse of the period. Figure 5-12 illustrates this method. Figure 5-12. Low Frequency with One Counter Interval Measured Gate … … Source Single Period Period of fx = Measurement Frequency of fx = © National Instruments | 5-11...

  • Page 87: High Frequency With Two Counters

    Chapter 5 Counters High Frequency with Two Counters For high frequency measurements with two counters, you measure one pulse of a known width using your signal and derive the frequency of your signal from the result. Counter 0 is always paired with Counter 1. Counter 2 is always paired with Note Counter 3.

  • Page 88: Large Range Of Frequencies With Two Counters

    From Counter 0, the length of the pulse is N/fx. From Counter 1, the length of the same pulse is J/fk. Therefore, the frequency of fx is given by fx = fk * (N/J). © National Instruments | 5-13...

  • Page 89: Sample Clocked Buffered Frequency Measurement

    Chapter 5 Counters Sample Clocked Buffered Frequency Measurement Sample clocked buffered point frequency measurements can either be a single frequency measurement or an average between sample clocks. Use CI.Freq.EnableAveraging to set the behavior. For buffered frequency, the default is True. A sample clocked buffered frequency measurement with CI.Freq.EnableAveraging set to True uses the embedded counter and a sample clock to perform a frequency measurement.

  • Page 90: Choosing A Method For Measuring Frequency

    N/fx where N is the divide down. • Sample clocked—For sample clocked frequency measurements, a known timebase is counted for the source frequency (fk). The measurement time is the period of the sample clock (fs). © National Instruments | 5-15...

  • Page 91: Which Method Is Best

    Chapter 5 Counters Table 5-2. Frequency Measurement Methods Two Counter High Variable Sample Clocked One Counter Frequency Large Range Known timebase Known Known timebase timebase ------------------------------- gating period Measurement gating period time --- - --- - --- - Max. × ------------------------------ - ×...
  • Page 92 50 k and 5 M with a measurement time of 1 ms the error percentage is still close to 0.00125%. One of the disadvantages of a sample clocked frequency measurement is that the frequency to be measured © National Instruments | 5-17...

  • Page 93: Period Measurement

    Chapter 5 Counters must be at least twice the sample clock rate to ensure that a full period of the frequency to be measured occurs between sample clocks. • Low frequency measurements with one counter is a good method for many applications. However, the accuracy of the measurement decreases as the frequency increases.

  • Page 94: Position Measurement

    X2 Encoding—The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A, depending on which channel leads the other. Each cycle results in two increments or decrements, as shown in Figure 5-18. © National Instruments | 5-19...

  • Page 95: Channel Z Behavior

    Chapter 5 Counters Figure 5-18. X2 Encoding Ch A Ch B Counter Value 5 • X4 Encoding—Similarly, the counter increments or decrements on each edge of channels A and B for X4 encoding. Whether the counter increments or decrements depends on which channel leads the other.

  • Page 96: Measurements Using Two Pulse Encoders

    Gate input of the counter. You can configure the counter to sample on the rising or falling edge of the sample clock. Figure 5-22 shows an example of a buffered X1 position measurement. © National Instruments | 5-21...

  • Page 97: Two-Signal Edge-Separation Measurement

    Chapter 5 Counters Figure 5-22. Buffered Position Measurement Counter Armed Sample Clock (Sample on Rising Edge) Ch A Ch B Count Buffer Two-Signal Edge-Separation Measurement Two-signal edge-separation measurement is similar to pulse-width measurement, except that there are two measurement signals—Aux and Gate. An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting.

  • Page 98: Implicit Buffered Two-Signal Edge-Separation Measurement

    On the next active edge of the Gate signal, the counter begins another measurement. The STC3 transfers the sampled values to host memory using a high-speed data stream. Figure 5-25 shows an example of a sample clocked buffered two-signal separation measurement. © National Instruments | 5-23...

  • Page 99: Counter Output Applications

    Chapter 5 Counters Figure 5-25. Sample Clocked Buffered Two-Signal Separation Measurement Sample Clock GATE SOURCE Counter Value Buffer If an active edge on the Gate and an active edge on the Aux does not occur Note between sample clocks, an overrun error occurs. For information about connecting counter signals, refer to the Default Counter/Timer Routing section.

  • Page 100: Single Pulse Generation With Start Trigger

    Refer to the following sections for more information about the cDAQ chassis pulse train generation options: • Finite Pulse Train Generation • Retriggerable Pulse or Pulse Train Generation • Continuous Pulse Train Generation • Buffered Pulse Train Generation • Finite Implicit Buffered Pulse Train Generation © National Instruments | 5-25...

  • Page 101: Finite Pulse Train Generation

    Chapter 5 Counters • Continuous Buffered Implicit Pulse Train Generation • Finite Buffered Sample Clocked Pulse Train Generation • Continuous Buffered Sample Clocked Pulse Train Generation Finite Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle for a predetermined number of pulses.

  • Page 102: Continuous Pulse Train Generation

    Start Trigger. You can route the Start Trigger to the Gate input of the counter. You also can use the Gate input of the counter as a Pause Trigger (if it is not used as a Start Trigger). The counter pauses pulse generation when the Pause Trigger is active. © National Instruments | 5-27...

  • Page 103: Buffered Pulse Train Generation

    Chapter 5 Counters Figure 5-31 shows a continuous pulse train generation (using the rising edge of Source). Figure 5-31. Continuous Pulse Train Generation SOURCE Counter Armed Continuous pulse train generation is sometimes called frequency division. If the high and low pulse widths of the output signal are M and N periods, then the frequency of the Counter n Internal Output signal is equal to the frequency of the Source input divided by M + N.

  • Page 104: Continuous Buffered Implicit Pulse Train Generation

    Table 5-7 and Figure 5-33 detail a finite sample clocked generation of three samples where the pulse specifications from the create channel are two ticks idle, two ticks active, and three ticks initial delay. © National Instruments | 5-29...

  • Page 105: Continuous Buffered Sample Clocked Pulse Train Generation

    Chapter 5 Counters Table 5-7. Finite Buffered Sample Clocked Pulse Train Generation Sample Idle Ticks Active Ticks Figure 5-33. Finite Buffered Sample Clocked Pulse Train Generation Counter Armed Sample Clock Counter 2 1 0 1 0 1 0 1 2 1 0 2 1 0 2 1 0 2 1 0 1 0 0 2 1 0 2 1 Load Values...

  • Page 106: Frequency Generation

    Frequency Output can be routed out to any PFI terminal. All PFI terminals are set to high-impedance at startup. The FREQ OUT signal also can be routed to many internal timing signals. In software, program the frequency generator as you would program one of the counters for pulse train generation. © National Instruments | 5-31...

  • Page 107: Frequency Division

    Chapter 5 Counters For information about connecting counter signals, refer to the Default Counter/Timer Routing section. Frequency Division The counters can generate a signal with a frequency that is a fraction of an input signal. This function is equivalent to continuous pulse train generation. Refer to the Continuous Pulse Train Generation section for detailed information.

  • Page 108: Counter Timing Signals

    Table 5-8. Counter Applications and Counter n Source Application Purpose of Source Terminal Pulse Generation Counter Timebase One Counter Time Measurements Counter Timebase Two Counter Time Measurements Input Terminal Non-Buffered Edge Counting Input Terminal © National Instruments | 5-33...

  • Page 109: Routing A Signal To Counter N Source

    Chapter 5 Counters Table 5-8. Counter Applications and Counter n Source (Continued) Application Purpose of Source Terminal Buffered Edge Counting Input Terminal Two-Edge Separation Counter Timebase Routing a Signal to Counter n Source Each counter has independent input selectors for the Counter n Source signal. Any of the following signals can be routed to the Counter n Source input: •...

  • Page 110: Routing Counter N Gate To An Output Terminal

    Routing Signals to A, B, and Z Counter Inputs Each counter has independent input selectors for each of the A, B, and Z inputs. Any of the following signals can be routed to each input: • Any PFI terminal • Analog Comparison Event © National Instruments | 5-35...

  • Page 111: Routing Counter N Z Signal To An Output Terminal

    Chapter 5 Counters Routing Counter n Z Signal to an Output Terminal You can route Counter n Z out to any PFI terminal. Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal. Counter n HW Arm Signal The Counter n HW Arm signal enables a counter to begin an input or output function.

  • Page 112: Using An Internal Source

    Routing Counter n Internal Output to an Output Terminal You can route Counter n Internal Output to any PFI terminal. Frequency Output Signal The Frequency Output (FREQ OUT) signal is the output of the frequency output generator. © National Instruments | 5-37...

  • Page 113: Routing Frequency Output To A Terminal

    Chapter 5 Counters Routing Frequency Output to a Terminal You can route Frequency Output to any PFI terminal. Default Counter/Timer Routing Counter/timer signals are available to parallel digital I/O C Series modules. To determine the signal routing options for modules installed in your system, refer to the Device Routes tab in MAX.

  • Page 114: Other Counter Features

    Depending on how you configure your chassis, the cDAQ chassis uses one of two synchronization methods: • 80 MHz Source Mode • External or Internal Source Less than 20 MHz © National Instruments | 5-39...

  • Page 115: 80 Mhz Source Mode

    Chapter 5 Counters 80 MHz Source Mode In 80 MHz source mode, the chassis synchronizes signals on the rising edge of the source, and counts on the third rising edge of the source. Edges are pipelined so no counts are lost, as shown in Figure 5-38.

  • Page 116: Digital Routing And Clock Generation

    Device Routes tab in MAX. Clock Routing Figure 6-1 shows the clock routing circuitry of the cDAQ chassis. Figure 6-1. Clock Routing Circuitry 80 MHz Timebase 80 MHz Timebase ÷ 20 MHz Timebase ÷ 100 kHz Timebase © National Instruments | 6-1...

  • Page 117: 80 Mhz Timebase

    Chapter 6 Digital Routing and Clock Generation 80 MHz Timebase You can use the 80 MHz Timebase as the Source input to the 32-bit general-purpose counter/timers. 20 MHz Timebase The 20 MHz Timebase normally generates many of the AI and AO timing signals. It can function as the Source input to the 32-bit general-purpose counter/timers.

  • Page 118: Controller Operating System And Configuration

    Front Panel Switches Set to Reserved State—This warning is displayed when the CMOS battery is dead and the DIP switches are configured to reset the CMOS and BIOS settings, as shown in Table A-1. This warning indicates that the BIOS settings have the default values. © National Instruments | A-1...
  • Page 119 Appendix A Controller Operating System and Configuration • Warning: Recovering from CPU Overtemp—This warning indicates that the thermal protection features of the cDAQ chassis shut down the system because of a high CPU temperature. • Warning: Recovering from Ambient Overtemp—This warning indicates that the thermal protection features of the cDAQ chassis shut down the system because of a high ambient temperature.
  • Page 120 <F9>—Use this key to load the optimal default values for all BIOS configuration settings. The optimal default values are the same as the shipping configuration default values. • <F10>—Use this key to save settings and exit the BIOS setup utility. © National Instruments | A-3...
  • Page 121 Appendix A Controller Operating System and Configuration Main Setup Menu The most commonly accessed and modified BIOS settings are in the Main setup menu. The Main setup menu reports the following configuration information: • BIOS Version and Build Date—These values indicate the version of the controller BIOS and the date on which the BIOS was built.
  • Page 122 Hardware Prefetcher—This setting enables or disables CPU cache hardware prefetching. The default value is enabled. • Adjacent Cache Line Prefetch—This setting enables or disables prefetching of adjacent cache lines from memory to the CPU cache. The default value is enabled. © National Instruments | A-5...
  • Page 123 Appendix A Controller Operating System and Configuration Video Configuration Submenu Use this submenu to apply alternate settings to the video configuration. Normally, you do not need to modify these settings, as the factory default settings provide the most compatible and optimal configuration possible.
  • Page 124 COM 1 (RS-232)—This setting enables or disables the onboard RS-232 serial port. The default value is Enabled. • Device Settings—This item displays the current base address and interrupt request level (IRQ) information for the onboard RS-232 serial port. © National Instruments | A-7...
  • Page 125 Appendix A Controller Operating System and Configuration • COM 2 (RS-485/422)—This setting enables or disables the onboard RS-485/422 serial port. The default value is Enabled. • Device Settings—This item displays the current base address and interrupt request level (IRQ) information for the onboard RS-485/422 serial port. Serial Port Console Redirection Submenu Use this submenu to access configuration information related to console redirection.
  • Page 126 (NI cDAQ-9139 for LabVIEW Real-Time) overriding the optimal configuration for Intel Turbo Boost technology when booting LabVIEW RT. Refer to the CPU Configuration Submenu section for more information. The default value is Use RT Default. © National Instruments | A-9...
  • Page 127 Appendix A Controller Operating System and Configuration Boot Setup Menu Use this menu to configure settings related to the boot process and boot device priority. • Boot Settings Configuration—Use this setting to access the Boot Settings Configuration submenu. Refer to the Boot Settings Configuration Submenu section for more information.
  • Page 128 The highest priority device is displayed on the main Boot Option Priorities list. Optionally, each device can also be Disabled if the device should never be used as a boot device. © National Instruments | A-11...
  • Page 129 Appendix A Controller Operating System and Configuration Security Menu Use this menu to enable BIOS security options. • Setup Administrator Password—This setting specifies a password that must be entered to access the BIOS Setup Utility. If only the Administrator’s password is set, then this only limits access to the BIOS setup utility and is only asked for when entering the BIOS setup utility.
  • Page 130 These DIP switch settings are only applicable when the CMOS battery is Note dead. Reconnect power to the cDAQ chassis. The warning message BIOS Reset Detected appears onscreen. Reset the DIP switches to their normal positions. © National Instruments | A-13...
  • Page 131 I/O modules, and how to confirm that your device is operating properly. The NI cDAQ-9138 Specifications and NI cDAQ-9139 Specifications list all specifications for your cDAQ chassis. Go to and search for your cDAQ chassis. ni.com/manuals © National Instruments | B-1...
  • Page 132 NI-DAQmx The NI-DAQmx Readme lists which devices, ADEs, and NI application software are supported by this version of NI-DAQ. Select Start»All Programs»National Instruments»NI-DAQmx» NI-DAQ Readme. The NI-DAQmx Help contains API overviews, general information about measurement concepts, key NI-DAQmx concepts, and common applications that are applicable to all programming environments.
  • Page 133 VIs, set up RT targets, and build, debug, and deploy real-time applications. Open the Getting Started with the LabVIEW Real-Time Module document by selecting Start»All Programs»National Instruments»LabVIEW»LabVIEW Manuals or by navigating to the directory and opening labview\manuals RT_Getting_Started.pdf...
  • Page 134 NI Services National Instruments provides global services and support as part of our commitment to your success. Take advantage of product services in addition to training and certification programs that meet your needs during each phase of the application life cycle; from planning and development through deployment and ongoing maintenance.
  • Page 135 Appendix C You also can visit the Worldwide Offices section of ni.com/niglobal to access the branch office • Training and Certification—The NI training and certification program is the most effective way to increase application development proficiency and productivity. Visit for more information. ni.com/training –...
  • Page 136 AO Start Trigger, 3-4 installation and configuration applications (LabVIEW Real-Time), 1-9 counter input, 5-3 installation and configuration (Windows counter output, 5-24 Embedded Standard 7), 1-5 edge counting, 5-3 mounting, 1-15 arm start trigger, 5-38 NI cDAQ-9138/9139, 1-2 © National Instruments | I-1...
  • Page 137 Index removing I/O modules, 1-21 simple pulse generation, 5-24 troubleshooting network single pulse generation, 5-24 communication, 1-12 with start trigger, 5-25 unpacking, 1-5 synchronization modes, 5-39 using, 1-37 timing signals, 5-33 wiring power, 1-13 triggering, 5-38 cDAQ module interface, 1-38 counting edges, 5-3 CFast SSD module, 1-35 channel Z behavior, 5-20...
  • Page 138 AI applications in software, 2-7 ports, 1-23 AO applications in software, 3-6 external source less than 40 MHz, 5-40 DI applications in software, 4-7 DO applications in software, 4-12 guidelines electromagnetic compatibility, 1-4 safety, 1-2 © National Instruments | I-3...
  • Page 139 Index pulse-width, 5-5 semi-period, 5-8 hard drive BBS priorities submenu, A-11 single pulse-width, 5-5 hardware-timed generations single semi-period, 5-9 analog output, 3-2 single two-signal edge-separation, 5-22 digital output, 4-8 two-signal edge-separation, 5-22 using quadrature encoders, 5-19 using two pulse encoders, 5-21 implicit buffered measuring pulse-width measurement, 5-6...
  • Page 140 4-8 rack mount kit, 1-21 reciprocal frequency measurement, 5-13 factory default condition, A-2 related documentation, B-1 module, 1-35 removing I/O modules, 1-21 start trigger, 5-38 RESET button, 1-31 STATUS LED, 1-33 STC3, 1-38 © National Instruments | I-5...
  • Page 141 Index submenus boot settings configuration, A-11 unpacking, 1-5 CD/DVD ROM drive BBS priorities, A-11 configuration submenu, A-6 console redirection settings, A-8 ports, 1-23 CPU configuration, A-5 USER 1 floppy drive BBS priorities, A-11 DIP switch, 1-31 hard drive BBS priorities, A-11 LED, 1-34 Intel AMT, A-7 using the BIOS setup utility to change...

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