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Contents Chapter 2 Analog Input Analog Input Triggering Signals ..................2-1 Analog Input Timing Signals.................... 2-1 AI Sample Clock Signal ...................2-2 Routing the Sample Clock to an Output Terminal ........... 2-2 AI Sample Clock Timebase Signal ................2-2 AI Convert Clock Signal Behavior For Analog Input Modules ....... 2-2 Scanned Modules....................
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Contents High Frequency with Two Counters..............5-12 Large Range of Frequencies with Two Counters ..........5-13 Sample Clocked Buffered Frequency Measurement ........5-14 Choosing a Method for Measuring Frequency ..........5-15 Which Method Is Best?..................5-16 Period Measurement ....................5-18 Position Measurement....................
The National Instruments CompactDAQ cDAQ-9138 controller features the 1.06 GHz Celeron processor. The National Instruments CompactDAQ cDAQ-9139 controller features the 1.33 GHz Intel Core i7 processor. The NI cDAQ-9138 and NI cDAQ-9139 are available as a Windows Embedded Standard 7 (WES7) or a LabVIEW Real-Time system.
Product misuse can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair. Because some C Series modules may have more stringent certification...
Furthermore, any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
At the end of the product life cycle, all products must be sent to EU Customers a WEEE recycling center. For more information about WEEE recycling centers, National Instruments WEEE initiatives, and compliance with WEEE Directive 2002/96/EC on Waste and Electronic Equipment, visit ni.com/environment/...
The NI-DAQmx driver software preloaded onto your cDAQ controller is available for download . The documentation for NI-DAQmx is available from Start»All ni.com/support Programs»National Instruments»NI-DAQ. Other NI documentation is available from ni.com/manuals Refer to Figure 1-1 while completing the following assembly steps.
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Chapter 1 Getting Started with the cDAQ Controller Connect a computer keyboard and mouse to the bottom two USB ports on the cDAQ controller. Attach a ring lug to a 1.31 mm (16 AWG) or larger wire. Remove the ground screw from the ground terminal on the front panel.
Chapter 1 Getting Started with the cDAQ Controller You can use the cDAQ controller BIOS setup utility to configure the cDAQ Note controller to start immediately when power is applied or to respond to the front-panel power button. Refer to the section of Power/Wake Configuration Submenu Appendix A,...
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The NI-DAQmx driver software is included on the disk shipped with your kit and is available for download at . The documentation for NI-DAQmx is available after ni.com/support installation from Start»All Programs»National Instruments»NI-DAQ. Other NI documentation is available from ni.com/manuals Power on the host computer and connect it to an Ethernet network.
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Chapter 1 Getting Started with the cDAQ Controller Verify that the DISABLE RT DIP switch is in the OFF position so that the controller will boot into LabVIEW Real-Time. Refer to the section for more information DIP Switches about the DISABLE RT DIP switch. Figure 1-4.
Chapter 1 Getting Started with the cDAQ Controller Topics»Remote Systems. On the Contents tab, browse to LabVIEW Real-Time Target Configuration»Configure Network Settings. For information about configuring the controller to launch an embedded stand-alone application at startup, refer to the LabVIEW Help. For more information about setting up the controller as an RT target, refer to the LabVIEW Help.
Chapter 1 Getting Started with the cDAQ Controller Install the power connector plug on the front panel of the cDAQ controller and tighten the connector screw flanges. Turn on the external power source(s). The cDAQ controller uses V1 if the voltage across V1 and C is 9 V or greater. If the V1-to-C voltage drops below 9 V, the cDAQ controller switches to V2.
Chapter 1 Getting Started with the cDAQ Controller Your installation must meet the following requirements for space and Caution cabling clearance, as shown in Figure 1-10: • Allow 50.8 mm (2 in.) on the top and the bottom of the controller for air circulation.
Fasten the mounting plate to the controller using a number 2 Phillips screwdriver and six M4 × 10 screws. National Instruments provides these screws with the panel mount kit. Tighten the screws to a maximum torque of 1.3 N · m (11.5 lb · in.).
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(0.88 in.) (0.38 in.) 7.2 mm 193.7 mm 193.7 mm 2.5 mm (0.29 in.) (7.63 in.) (7.63 in.) (0.10 in.) NI cDAQ-9139 cDAQ-9139 NI CompactDAQ NI CompactDAQ 114.3 mm (4.50 in.) 25.4 mm (1.00 in.) 108.9 mm 188.6 mm 108.9 mm (4.29 in.)
Fasten the DIN rail clip to the controller using a number 2 Phillips screwdriver and three M4 × 10 screws. National Instruments provides these screws with the DIN rail mount kit. Tighten the screws to a maximum torque of 1.3 N · m (11.5 lb · in.). Make sure the DIN rail kit is installed as shown in Figure 1-16, with the larger lip of the DIN clip positioned up.
Chapter 1 Getting Started with the cDAQ Controller Figure 1-16. Installing the DIN Rail Clip on the cDAQ Controller Insert one edge of the DIN rail into the deeper opening of the DIN rail clip, as shown in Figure 1-17, and press down firmly on the controller to compress the spring until the clip locks in place on the DIN rail.
Chapter 1 Getting Started with the cDAQ Controller Do not hot-swap VGA devices while the cDAQ controller is in a Caution hazardous location or connected to high voltages. USB Ports The cDAQ controller supports common USB mass-storage devices such as USB Flash drives and USB-to-IDE adapters formatted with FAT16 and FAT32 file systems.
Chapter 1 Getting Started with the cDAQ Controller Table 1-5. Ethernet LED Indications (Continued) LED Color LED State Indication 10/100/ Yellow Solid 1,000 Mbit/s data rate selected 1000 Green Solid 100 Mbit/s data rate selected — 10 Mbit/s data rate selected Ethernet Cabling Table 1-6 shows the shielded Ethernet cable wiring connections for both straight through and crossover cables.
Chapter 1 Getting Started with the cDAQ Controller Cable adapters for the 10-position modular jacks are available from NI. Part numbers 182845-01, -02, and -03 are 1, 2, and 3 m cable adapters for connecting the 10-position modular jack to a 9-position D-SUB plug. Go to and enter Info Code for up-to-date information about supported...
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Chapter 1 Getting Started with the cDAQ Controller Table 1-7. DIP Switches (Continued) Switch Description CONSOLE OUT The position of the (NI cDAQ-9138/9139 for LabVIEW Real-Time) CONSOLE OUT switch determines whether console input and output are redirected to the RS-232 serial port. If the switch is in the ON position, console input and output are redirected to the RS-232 serial port.
Chapter 1 Getting Started with the cDAQ Controller LEDs The cDAQ controller features four LEDs—POWER, DRIVE, STATUS, and USER1—on its front panel, two LEDs—ACT/LINK and 10/100/1000—near each Ethernet connector, and one LINK LED near the MXI-Express port. Refer to Figure 1-1 for the locations of the LEDs. Table 1-8 lists the LEDs and status indications.
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Continuously Software error—The controller has detected an flashing unrecoverable error. Contact National Instruments. Continuously Software error—The device may be configured for DHCP flashing or but unable to get an IP address because of a problem with solid the DHCP server.
Ensure that the ambient operating temperature does not exceed the range specified in the Environmental section of the specifications document for your cDAQ controller. If the problem persists, contact National Instruments. — Normal operation. USER1 Green/ —...
Chapter 1 Getting Started with the cDAQ Controller If you use shielded cabling to connect to a C Series module with a plastic Note connector, you must attach the cable shield to the chassis grounding terminal using 1.31 mm (16 AWG) or larger wire. Use shorter wire for better EMC performance. CPU eXpansion Module (CXM) Connector In the future, the CXM connector will enable you to connect additional industry-standard I/O to the cDAQ controller.
MXI Express C Series Module National Instruments C Series modules provide built-in signal conditioning and screw terminal, spring terminal, BNC, D-SUB, or RJ-50 connectors. A wide variety of I/O types are available, allowing you to customize the cDAQ controller to meet your application needs.
Chapter 1 Getting Started with the cDAQ Controller modules to your sensors/actuators. C Series modules can sometimes provide isolation from channel-to-earth ground and channel-to-channel. For more information about which C Series modules are compatible with the cDAQ controller, refer to the C Series Support in NI-DAQmx document by going to and entering ni.com/info the Info Code...
Chapter 2 Analog Input Scanned Modules Scanned C Series analog input modules contain a single A/D converter and a multiplexer to select between multiple input channels. When the cDAQ Module Interface receives a Sample Clock pulse, it begins generating a Convert Clock for each scanned module in the current task. Each Convert Clock signals the acquisition of a single channel from that module.
Chapter 2 Analog Input An acquisition that uses a start trigger (but not a reference trigger) is sometimes referred to as a posttriggered acquisition. That is, samples are measured only after the trigger. When you are using an internal sample clock, you can specify a default delay from the start trigger to the first sample.
Chapter 2 Analog Input AI Pause Trigger Signal You can use the Pause Trigger to pause and resume a measurement acquisition. The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive. You can program the active level of the pause trigger to be high or low. Using a Digital Source To use the Pause Trigger, specify a source and a polarity.
Chapter 3 Analog Output Hardware-Timed Generations With a hardware-timed generation, a digital hardware signal controls the rate of the generation. This signal can be generated internally on the controller or provided externally. Hardware-timed generations have several advantages over software-timed acquisitions: •...
Chapter 3 Analog Output Routing AO Sample Clock to an Output Terminal You can route AO Sample Clock to any output PFI terminal. AO Sample Clock is active high by default. AO Sample Clock Timebase Signal The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is divided down to provide a source for AO Sample Clock.
Chapter 3 Analog Output When you use an analog trigger source, the samples are paused when the Analog Comparison Event signal is at a high or low level, depending on the trigger properties. The analog trigger circuit must be configured by a simultaneously running analog input task. Depending on the C Series module capabilities, you may need two modules Note to utilize analog triggering.
Chapter 4 Digital Input/Output and PFI Static DIO Each of the DIO lines can be used as a static DI or DO line. You can use static DIO lines to monitor or control digital signals on some C Series modules. Each DIO line can be individually configured as a digital input (DI) or digital output (DO), if the C Series module being used allows such configuration.
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Chapter 4 Digital Input/Output and PFI Using an External Source You can route the following signals as DI Sample Clock: • Any PFI terminal • Analog Comparison Event (an analog trigger) You can sample data on the rising or falling edge of DI Sample Clock. Routing DI Sample Clock to an Output Terminal You can route DI Sample Clock to any output PFI terminal.
Chapter 4 Digital Input/Output and PFI When you use an analog trigger source, the acquisition stops on the first rising or falling edge of the Analog Comparison Event signal, depending on the trigger properties. Depending on the C Series module capabilities, you may need two modules Note to utilize analog triggering.
Chapter 4 Digital Input/Output and PFI Change detection acquisitions can be buffered or nonbuffered: • Nonbuffered Change Detection Acquisition—In a nonbuffered acquisition, data is transferred from the cDAQ controller directly to a PC buffer. • Buffered Change Detection Acquisition—A buffer is a temporary storage in computer memory for acquired samples.
Chapter 4 Digital Input/Output and PFI A digital or analog trigger can initiate these actions. Any PFI terminal can supply a digital trigger, and some C Series analog modules can supply an analog trigger. For more information, refer to the documentation included with your C Series module(s). Refer to the sections for more DO Start Trigger Signal...
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Chapter 4 Digital Input/Output and PFI Figure 4-5. DO Pause Trigger with the Onboard Clock Source Pause Trigger Sample Clock If you are using any signal other than the onboard clock as the source of the sample clock, the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received, as shown in Figure 4-6.
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Chapter 4 Digital Input/Output and PFI on N consecutive edges, the low-to-high transition is propagated to the rest of the circuit. The value of N depends on the filter setting, as shown in Table 4-1. Table 4-1. Selectable PFI Filter Settings Min Pulse Filter Width...
Chapter 5 Counters Counter Timing Engine Unlike analog input, analog output, digital input, and digital output, the cDAQ controller counters do not have the ability to divide down a timebase to produce an internal counter sample clock. For sample clocked operations, an external signal must be provided to supply a clock source.
Chapter 5 Counters You also can use a pause trigger to pause (or gate) the counter. When the pause trigger is active, the counter ignores edges on its Source input. When the pause trigger is inactive, the counter counts edges normally. You can route the pause trigger to the Gate input of the counter.
Chapter 5 Counters Implicit Buffered Pulse-Width Measurement An implicit buffered pulse-width measurement is similar to single pulse-width measurement, but buffered pulse-width measurement takes measurements over multiple pulses. The counter counts the number of edges on the Source input while the Gate input remains active. On each trailing edge of the Gate signal, the counter stores the count in the counter FIFO.
Chapter 5 Counters Figure 5-9 shows an example of an implicit buffered pulse measurement. Figure 5-9. Implicit Buffered Pulse Measurement Counter Armed Gate Source Buffer Sample Clocked Buffered Pulse Measurement A sample clocked buffered pulse measurement is similar to single pulse measurement, but a buffered pulse measurement takes measurements over multiple pulses correlated to a sample clock.
Chapter 5 Counters Pulse versus Semi-Period Measurements In hardware, pulse measurement and semi-period are the same measurement. Both measure the high and low times of a pulse. The functional difference between the two measurements is how the data is returned. In a semi-period measurement, each high or low time is considered one point of data and returned in units of seconds or ticks.
Chapter 5 Counters High Frequency with Two Counters For high frequency measurements with two counters, you measure one pulse of a known width using your signal and derive the frequency of your signal from the result. Counter 0 is always paired with Counter 1. Counter 2 is always paired with Note Counter 3.
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Chapter 5 Counters Sample Clocked Buffered Frequency Measurement Sample clocked buffered point frequency measurements can either be a single frequency measurement or an average between sample clocks. Use CI.Freq.EnableAveraging to set the behavior. For buffered frequency, the default is True. A sample clocked buffered frequency measurement with CI.Freq.EnableAveraging set to True uses the embedded counter and a sample clock to perform a frequency measurement.
Chapter 5 Counters Table 5-2. Frequency Measurement Methods Two Counter High Variable Sample Clocked One Counter Frequency Large Range Known timebase Known Known timebase timebase ------------------------------- gating period gating period Measurement time --- - --- - --- - Max. ------------------------------ - ...
Chapter 5 Counters must be at least twice the sample clock rate to ensure that a full period of the frequency to be measured occurs between sample clocks. • Low frequency measurements with one counter is a good method for many applications. However, the accuracy of the measurement decreases as the frequency increases.
Chapter 5 Counters Figure 5-18. X2 Encoding Ch A Ch B Counter Value 5 • X4 Encoding—Similarly, the counter increments or decrements on each edge of channels A and B for X4 encoding. Whether the counter increments or decrements depends on which channel leads the other.
Chapter 5 Counters Figure 5-22. Buffered Position Measurement Counter Armed Sample Clock (Sample on Rising Edge) Ch A Ch B Count Buffer Two-Signal Edge-Separation Measurement Two-signal edge-separation measurement is similar to pulse-width measurement, except that there are two measurement signals—Aux and Gate. An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting.
Chapter 5 Counters Figure 5-25. Sample Clocked Buffered Two-Signal Separation Measurement Sample Clock GATE SOURCE Counter Value Buffer If an active edge on the Gate and an active edge on the Aux does not occur Note between sample clocks, an overrun error occurs. For information about connecting counter signals, refer to the Default Counter/Timer Routing section.
Chapter 5 Counters • Continuous Buffered Implicit Pulse Train Generation • Finite Buffered Sample Clocked Pulse Train Generation • Continuous Buffered Sample Clocked Pulse Train Generation Finite Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle for a predetermined number of pulses.
Chapter 5 Counters Figure 5-31 shows a continuous pulse train generation (using the rising edge of Source). Figure 5-31. Continuous Pulse Train Generation SOURCE Counter Armed Continuous pulse train generation is sometimes called frequency division. If the high and low pulse widths of the output signal are M and N periods, then the frequency of the Counter n Internal Output signal is equal to the frequency of the Source input divided by M + N.
Chapter 5 Counters For information about connecting counter signals, refer to the Default Counter/Timer Routing section. Frequency Division The counters can generate a signal with a frequency that is a fraction of an input signal. This function is equivalent to continuous pulse train generation. Refer to the Continuous Pulse Train section for detailed information.
Chapter 5 Counters Table 5-8. Counter Applications and Counter n Source (Continued) Application Purpose of Source Terminal Buffered Edge Counting Input Terminal Two-Edge Separation Counter Timebase Routing a Signal to Counter n Source Each counter has independent input selectors for the Counter n Source signal. Any of the following signals can be routed to the Counter n Source input: •...
Chapter 5 Counters Routing Counter n Z Signal to an Output Terminal You can route Counter n Z out to any PFI terminal. Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal. Counter n HW Arm Signal The Counter n HW Arm signal enables a counter to begin an input or output function.
Chapter 5 Counters Routing Frequency Output to a Terminal You can route Frequency Output to any PFI terminal. Default Counter/Timer Routing Counter/timer signals are available to parallel digital I/O C Series modules. To determine the signal routing options for modules installed in your system, refer to the Device Routes tab in MAX.
Chapter 5 Counters 80 MHz Source Mode In 80 MHz source mode, the controller synchronizes signals on the rising edge of the source, and counts on the third rising edge of the source. Edges are pipelined so no counts are lost, as shown in Figure 5-38.
Chapter 6 Digital Routing and Clock Generation 80 MHz Timebase You can use the 80 MHz Timebase as the Source input to the 32-bit general-purpose counter/timers. 20 MHz Timebase The 20 MHz Timebase normally generates many of the AI and AO timing signals. It can function as the Source input to the 32-bit general-purpose counter/timers.
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Appendix A Controller Operating System and Configuration • Warning: Recovering from CPU Overtemp—This warning indicates that the thermal protection features of the cDAQ controller shut down the system because of a high CPU temperature. • Warning: Recovering from Ambient Overtemp—This warning indicates that the thermal protection features of the cDAQ controller shut down the system because of a high ambient temperature.
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Appendix A Controller Operating System and Configuration Table A-1. BIOS Setup Utility Keyboard Navigation (Continued) Key(s) Function(s) <F9> Loads the optimal default values for all BIOS configuration settings. The optimal default values are the same as the shipping configuration default values. <F10>...
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Appendix A Controller Operating System and Configuration Video Configuration Submenu Use this submenu to apply alternate settings to the video configuration. Normally, you do not need to modify these settings, as the factory default settings provide the most compatible and optimal configuration possible.
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Appendix A Controller Operating System and Configuration • COM 2 (RS-485/422)—This setting enables or disables the onboard RS-485/422 serial port. The default value is Enabled. • Device Settings—This item displays the current base address and interrupt request level (IRQ) information for the onboard RS-485/422 serial port. Serial Port Console Redirection Submenu Use this submenu to access configuration information related to console redirection.
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Real Time system. • This setting allows CPU Hyper Threading— (NI cDAQ-9139 for LabVIEW Real-Time) overriding the optimal configuration for Intel Hyper-Threading technology when booting LabVIEW RT. Refer to the section for more information. The CPU Configuration Submenu default value is Use RT Default.
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Appendix A Controller Operating System and Configuration Boot Setup Menu Use this menu to configure settings related to the boot process and boot device priority. • Submenu—Use this setting to access the Boot Settings Boot Settings Configuration Configuration submenu. • SCSI Drive Boot—This setting specifies whether or not boot support is enabled for legacy mass storage devices, such as SCSI drives.
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Appendix A Controller Operating System and Configuration power-on password and must be entered to boot or enter the BIOS setup utility. In the BIOS setup utility, the User has Administrator rights. By default, no password is specified. Save & Exit Menu The Save &...
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NI-DAQmx for Windows software, install the cDAQ controller and C Series modules, and how to confirm that your device is operating properly. The NI cDAQ-9138 Specifications and NI cDAQ-9139 Specifications list all specifications for your cDAQ controller. Go to and search for your cDAQ controller.
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Appendix B Where to Go from Here The NI cDAQ-9138 Safety, Environmental, and Regulatory Information or NI cDAQ-9139 Safety, Environmental, and Regulatory Information includes important hazardous locations information, compliance precautions, and connection information for your cDAQ controller. Go and search for your cDAQ controller.
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VIs, set up RT targets, and build, debug, and deploy real-time applications. Open the Getting Started with the LabVIEW Real-Time Module document by selecting Start»All Programs»National Instruments»LabVIEW»LabVIEW Manuals or by navigating to the directory and opening labview\manuals RT_Getting_Started.pdf...
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