CHAINTECH CT-6AIA2 Manual page 41

User's Manual
C. Reset Configuration Data
When enabled the system BIOS will clear/reset the ESCD during POST.
After clearing the ESCD, the BIOS will then change this item's value to
Disabled. Otherwise, the ESCD data will become useless.
D. IRQ#/DMA# assign to
When resources are controlled manually, you can assign each system interrupt
& DMA channel for "Legacy ISA" or "PCI/ISA PnP" card used.While using
Legacy ISA Card(non-PnP ISA card), please set it's necessary corresponding
resources (INT#, DMA#) from "PCI/ISA PnP" to "Legacy ISA."
All ISA non-PnP devices are legacy devices that select resources (I/O Addr.,
INT# or DMA#) by using hardware jumpers.
IRQ-3/4/7/12/14/15 have been set as default for on board devices (COM2,
COM1, Printer port, PS/2 mouse, IDE1 and IDE2).
E. CPU to PCI Write Buffer
When Enabled, CPU to the PCI bus are buffered, to compensate for the speed
differences between the CPU and the PCI bus.
F. PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions
cycles. Select Enabled to support compliance with PCI specification version 2.1.
G. Assign IRQ For USB
If USB is employed this function must be Enabled. Otherwise, disable this
function to optimize Windows 95 IRQ resources for other IRQ usage.
N/A (disabled.)
H. Assign IRQ For VGA
This function allows BIOS to make an IRQ available to VGA cards. Most
current VGA card models do not require this function to be enabled.
I. FDD IRQ Can Be Free
This function allows user to choose if the FDD IRQ is able to be freed up. The
default setting is Yes and this does not allow the IRQ to be free.
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