ST M41ST85W Manual
ST M41ST85W Manual

ST M41ST85W Manual

3.0/3.3 v i2c combination serial rtc, nvram supervisor and microprocessor supervisor
Table of Contents

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Features
Automatic battery switchover and WRITE
protect for:
– Internal serial RTC and
– External low power SRAM (LPSRAM)
2
400 kHz I
C serial interface
3.0/3.3 V operating voltage
– V
= 2.7 to 3.6 V
CC
Ultralow battery supp
RoHS compliant
– Lead-free second level interconnect
Serial RTC features
2
400 kHz I
C
44 bytes of general purpose NVRAM
Counters for:
– Seconds, minutes, hours, day, date, month,
and year
– Century
– Tenths/hundredths of seconds
– Clock calibration register allows
compensation for crystal variations over
temperature
Programmable alarm with repeat modes
– Functions in battery back-up mode
Power-down timestamp (HT bit)
2.5 to 5.5 V oscillator operating voltage
Microprocessor supervisor features
Programmable watchdog
– 62.5 ms to 128 s time-out period
Early power-fail warning circuit (PFI/PFO) with
1.25 V precision reference
October 2011
3.0/3.3 V I
supervisor and microprocessor supervisor
y current of 500 nA
max
l
(
Doc ID 7531 Rev 11
2
C combination serial RTC, NVRAM
SNAPHAT battery & crystal
)
Power-on reset/low voltage detect
– Open drain reset output
– Reset voltage, V
– Two reset input pins
– Watchdog can be steered to reset output
NVRAM supervisor features
Non-volatizes external LPSRAM
– Automatically switches to back-up battery
and deselects (write-protects) external
LPSRAM via chip-enable gate
– Power-fail deselect (write protect) voltage,
V
= 2.60 V (nom)
PFD
– Switchover, V
Battery monitor (battery low flag)
Other features
Programmable squarewave generator (1 Hz to
32 KHz)
–40°C to +85°C operation
Package options:
– 28-lead SNAPHAT
battery/crystal top to be ordered separately
– 28-lead embedded crystal SOIC (SOX28)
M41ST85W
28
1
SOH28
Embedded crystal
SOX28
= 2.60 V (nom)
PFD
= 2.50 V (nom)
SO
®
IC (SOH28) SNAPHAT
1/43
www.st.com
1

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Summary of Contents for ST M41ST85W

  • Page 1 M41ST85W 3.0/3.3 V I C combination serial RTC, NVRAM supervisor and microprocessor supervisor Features SNAPHAT battery & crystal ■ Automatic battery switchover and WRITE protect for: – Internal serial RTC and – External low power SRAM (LPSRAM) ■ 400 kHz I C serial interface ■...
  • Page 2: Table Of Contents

    Contents M41ST85W Contents Description ..........6 Operating modes .
  • Page 3 M41ST85W Contents Package mechanical data ........34 Part numbering .
  • Page 4 List of tables M41ST85W List of tables Table 1. Signal names ............8 ®...
  • Page 5 M41ST85W List of figures List of figures Figure 1. Logic diagram ............7 Figure 2.
  • Page 6: Description

    ® The M41ST85W is offered in two 28-lead SOIC packages. The 300 mil SOH28 SNAPHAT IC package mates with ST’s SNAPHAT battery/crystal top (ordered separately). SNAPHAT battery options include 48 mAh and 120 mAh. ST’s 300 mil SOX28 embedded crystal IC includes the 32 KHz crystal and is perfect for applications where a low profile is a must.
  • Page 7: Figure 1. Logic Diagram

    M41ST85W Description M4T28-BR12SH1 (48 mAh) and M4T32-BR12SH1 (120 mAh). For the extended temperature requirement, the 120 mAh M4T32-BR12SH6 is available. For more information, Table 21 on page ® Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the lithium button-cell battery.
  • Page 8: Table 1. Signal Names

    Description M41ST85W Table 1. Signal names Conditioned chip enable output External chip enable IRQ/FT/OUT Interrupt/frequency test/out output (open drain) Power fail input Power fail output Reset output (open drain) RSTIN1 Reset 1 Input RSTIN2 Reset 2 Input Serial clock input...
  • Page 9: Figure 3. 28-Pin, 300 Mil Soic Connections

    M41ST85W Description Figure 3. 28-pin, 300 mil SOIC connections V CC IRQ/FT/OUT V OUT M41ST85W RSTIN1 RSTIN2 E CON V SS V BAT AI06370d Note: No function (NF) pins should be tied to V . Pins 1, 2, 3, and 4 are internally shorted together.
  • Page 10: Figure 4. Block Diagram

    Description M41ST85W Figure 4. Block diagram REAL TIME CLOCK CALENDAR 44 BYTES I 2 C USER RAM INTERFACE RTC w/ALARM & CALIBRATION IRQ/FT/OUT (1) WATCHDOG 32KHz Crystal OSCILLATOR SQUARE WAVE V CC V OUT V BAT COMPARE V BL = 2.5V COMPARE V SO = 2.5V...
  • Page 11: Figure 5. Hardware Hookup

    M41ST85W Description Figure 5. Hardware hookup M41ST85W Regulator Unregulated V IN V CC V CC V OUT V CC Voltage E CON LPSRAM RSTIN1 To RST RSTIN2 To LED Display Pushbutton Reset To NMI (1) IRQ/FT/OUT To INT V BAT...
  • Page 12: Operating Modes

    M41ST85W Operating modes The M41ST85W clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 64 bytes contained in the device can then be accessed sequentially in the following order:...
  • Page 13: Bus Not Busy

    M41ST85W Operating modes Accordingly, the following bus conditions have been defined: 2.1.1 Bus not busy Both data and clock lines remain high. 2.1.2 Start data transfer A change in the state of the data line, from high to low, while the clock is high, defines the START condition.
  • Page 14: Figure 6. Serial Bus Data Transfer Sequence

    Operating modes M41ST85W Figure 6. Serial bus data transfer sequence DATA LINE STABLE DATA VALID CLOCK DATA START CHANGE OF STOP CONDITION DATA ALLOWED CONDITION AI00587 Figure 7. Acknowledgement sequence CLOCK PULSE FOR ACKNOWLEDGEMENT START SCL FROM MASTER DATA OUTPUT...
  • Page 15: Read Mode

    M41ST85W Operating modes Read mode In this mode the master reads the M41ST85W slave after setting the slave address (see Figure 9). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word address 'An' is written to the on-chip address pointer. Next the START condition and slave address are repeated followed by the READ mode control bit (R/W=1).
  • Page 16: Figure 10. Read Mode Sequence

    Operating modes M41ST85W Figure 10. Read mode sequence BUS ACTIVITY: MASTER WORD SDA LINE DATA n DATA n+1 ADDRESS (An) BUS ACTIVITY: SLAVE SLAVE ADDRESS ADDRESS DATA n+X AI00899 Figure 11. Alternate read mode sequence BUS ACTIVITY: MASTER SDA LINE...
  • Page 17: Write Mode

    33). Note: Most low power SRAMs on the market today can be used with the M41ST85W RTC SUPERVISOR. There are, however some criteria which should be used in making the final choice of an SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM.
  • Page 18 The system level requirements will determine the choice of which value to use. The data retention current value of the SRAMs can then be added to the I value of the M41ST85W to determine the total current requirements for data retention. The available ® battery capacity for the SNAPHAT...
  • Page 19: Clock Operation

    The ninth clock register is the control register (this is described in the clock calibration section). Bit D7 of register 01h contains the STOP bit (ST). Setting this bit to a '1' will cause the oscillator to stop. If the device is expected to spend a significant amount of time on the shelf, the oscillator may be stopped to reduce current drain.
  • Page 20: Table 2. Timekeeper ® Register Map

    RB0-RB1 = Watchdog resolution bits FT = Frequency test bit WDS = Watchdog steering bit ST = Stop bit ABE = Alarm in battery backup mode enable bit 0 = Must be set to zero RPT1-RPT5 = Alarm repeat mode bits...
  • Page 21: Calibrating The Clock

    The second approach is better suited to a manufacturing environment, and involves the use of the IRQ/FT/OUT pin. The pin will toggle at 512 Hz, when the stop bit (ST, D7 of 01h) is '0,' the frequency test bit (FT, D6 of 08h) is '1,' the alarm flag enable bit (AFE, D7 of 0Ah) is '0,' and the watchdog steering bit (WDS, D7 of 09h) is '1' or the watchdog register (09h = 0) is reset.
  • Page 22: Figure 13. Crystal Accuracy Across Temperature

    Clock operation M41ST85W Figure 13. Crystal accuracy across temperature Frequency (ppm) –20 –40 –60 ΔF = K x (T – T –80 = –0.036 ppm/°C ± 0.006 ppm/°C –100 = 25°C ± 5°C –120 –140 –160 –40 –30 –20 –10 Temperature °C...
  • Page 23: Setting Alarm Clock Registers

    The ABE and AFE bits are reset during power-up, therefore an alarm generated during power-up will only set AF. The user can read the flag register at system boot-up to determine if an alarm was generated while the M41ST85W was in the deselect mode during power-up.
  • Page 24: Watchdog Timer

    Note: The accuracy of the timer is within ± the selected resolution. If the processor does not reset the timer within the specified period, the M41ST85W sets the WDF (watchdog flag) and generates a watchdog interrupt or a microprocessor reset.
  • Page 25: Square Wave Output

    Square wave output The M41ST85W offers the user a programmable square wave function which is output on the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency. These frequencies are listed in Table 4.
  • Page 26: Reset Inputs (Rstin1 & Rstin2)

    Clock operation M41ST85W Reset inputs (RSTIN1 & RSTIN2) The M41ST85W provides two independent inputs which can generate an output reset. The duration and function of these resets is identical to a reset generated by a power cycle. Table 5 Figure 17 illustrate the AC reset characteristics of this function.
  • Page 27: Century Bit

    3.12 Battery low warning The M41ST85W automatically performs battery voltage monitoring upon power-up and at factory-programmed time intervals of approximately 24 hours. The battery low (BL) bit, bit D4 of flags register 0Fh, will be asserted if the battery voltage is found to be less than approximately 2.5 V.
  • Page 28: T Rec Bit

    Upon initial application of power to the device, the following register bits are set to a '0' state: watchdog register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state: ST, OUT, and HT (see Table Table 6.
  • Page 29: Maximum Ratings

    M41ST85W Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
  • Page 30: Dc And Ac Parameters

    DC and AC parameters M41ST85W DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in the relevant tables.
  • Page 31: Table 11. Dc Characteristics

    M41ST85W DC and AC parameters Table 11. DC characteristics M41ST85W Parameter Test condition Unit Battery current OSC ON = 25°C, V = 0 V, V = 3 V Battery current OSC OFF Supply current f = 400 kHz 0.75 SCL, SDA = V –...
  • Page 32: Table 12. Ac Characteristics

    DC and AC parameters M41ST85W Figure 19. Bus timing requirements sequence tBUF tHD:STA tHD:STA tHIGH tSU:DAT tSU:STA tSU:STO tLOW tHD:DAT AI00589 Table 12. AC characteristics Symbol Parameter Unit SCL clock frequency Time the bus must be free before a new transmission can start µs...
  • Page 33: Table 13. Power Down/Up Ac Characteristics

    M41ST85W DC and AC parameters Figure 20. Power down/up mode AC waveforms V CC V PFD (max) V PFD (min) V SO trec INPUTS RECOGNIZED DON'T CARE RECOGNIZED HIGH-Z OUTPUTS VALID VALID (PER CONTROL INPUT) (PER CONTROL INPUT) E CON AI03661 Table 13.
  • Page 34: Package Mechanical Data

    Package mechanical data M41ST85W Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com.
  • Page 35: Table 15. 4-Pin Snaphat ® Housing For 48 Mah Battery & Crystal, Mechanical Data

    M41ST85W Package mechanical data ® Figure 22. 4-pin SNAPHAT housing for 48 mAh battery & crystal, package outline SHTK-A Note: Drawing is not to scale. ® Table 15. 4-pin SNAPHAT housing for 48 mAh battery & crystal, mechanical data millimeters...
  • Page 36: Table 16. 4-Pin Snaphat ® Housing For 120 Mah Battery & Crystal, Mechanical Data

    Package mechanical data M41ST85W ® Figure 23. 4-pin SNAPHAT housing for 120 mAh battery & crystal, package outline SHTK-A Note: Drawing is not to scale. ® Table 16. 4-pin SNAPHAT housing for 120 mAh battery & crystal, mechanical data millimeters...
  • Page 37: Table 17. Sox28 - 28-Lead Plastic Small Outline, 300 Mils, Embedded Crystal, Mechanical Data

    M41ST85W Package mechanical data Figure 24. SOX28 – 28-lead plastic small outline, 300 mils, embedded crystal, package outline h x 45° α SO-E Note: Drawing is not to scale. Table 17. SOX28 – 28-lead plastic small outline, 300 mils, embedded crystal, mechanical data...
  • Page 38: Table 18. Carrier Tape Dimensions For Soh28 And Sox28 Packages

    Package mechanical data M41ST85W Figure 25. Carrier tape for SOH28 and SOX28 package TOP COVER TAPE CENTER LINES OF CAVITY USER DIRECTION OF FEED AM03073v1 Table 18. Carrier tape dimensions for SOH28 and SOX28 packages Bulk Package Unit 1.50 24.00 1.75...
  • Page 39: Table 19. Reel Dimensions For 24 Mm Carrier Tape (Soh28 And Sox28 Packages)

    M41ST85W Package mechanical data Figure 26. Reel schematic 40mm min. Access hole At slot location G measured Tape slot In core for Full radius At hub Tape start 2.5mm min.width AM04928v1 Table 19. Reel dimensions for 24 mm carrier tape (SOH28 and SOX28 packages)
  • Page 40: Table 20. Ordering Information Scheme

    Do not place the SNAPHAT battery package “M4Txx-BR12SH” in conductive foam as it will drain the lithium button-cell battery. For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you. ®...
  • Page 41: Figure 27. Recycling Symbols

    M41ST85W Environmental information Environmental information Figure 27. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations.
  • Page 42: Table 22. Document Revision History

    Revision history M41ST85W Revision history Table 22. Document revision history Date Revision Changes Aug-2000 First issue 24-Aug-2000 Block diagram added (Figure 12-Oct-2000 table removed, cross references corrected 18-Dec-2000 Reformatted, TOC added, and PFI input leakage current added (Table Addition of t...
  • Page 43 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.

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