Honeywell H112 Instruction Manual page 38

TIME
,
/i,
SECONDS
INPUTS TO
CONTROLLER
ADDRESS
HIXXX-
INPUT
HINLX-
CYCLE REQUEST
HCRLX-
DATA INPUT
KDBXX-
10
I
2.0
I
2.1
3.0
4.0
I
i!!ii!i!i||f!liSil!IS¥ilR"Ji!fs^^^
ONLY
IF
CHANNEL
IS
ACTIVE
NEXT
CYCLE
OUTPUTS FROM CONTROLLER
CYCLE
ACKNOWLEDGE
HACKX-
DATA INPUT TIME
HIDTX-
DATA
STROBE
HDSTX-
OUTPUT DATA
KDBXX-
,
KABXX-
liTI:
J
:i
III
lllllllllll
I
Figure 4-2. Direct Data
Channel Timing (Composite)
A
single
DDC
cycle takes 3.816
pts
to
execute.
The
same
period
of
time
is
taken
from
the
execution
of the
progrann.
If
a
second request (from
either the active or inactive
subchannel)
is
received before
the
completion
of
the first
transfer, the
second
DDC
cycle
will
take place
immediately following the
first.
The second and
all
subsequent
DDC
cycles
takes
3.392
jUs if
all
subsequent
cycle requests are
made
prior
to
the
completion
of
the
previous transfer.
If
continued requests are
made,
the
program
execution
may
be locked
out entirely.
The
DDC
transfer alters no
programmable
registers, flip-flops or
machine
states (interrupt inhibits, etc.)
except for the
core location into
which
data
might have been
written.
DDC
cycles take place only
when
the
machine
is
running
(not
halted due
to a
HLT
instruction, or stalled
due
to a
STL
instruction).
The maximvim wait before a
DDC
cycle
starts
is
11
/is
(the
longest instruction) for
Channel
A, Channel B
has
the
same maximvim
wait except
if
a
Channel
A
request locks
Channel
B
out.
4-3