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The
state of the
mask
flip-flop
is
under
the
control
of
the
program
via
SMK
(SET
MASK)
instructions.
Each
standard device has one
mask
bit
and
an associated
bit in
the
accumulator.
The
mask
flip-flop
copies
the state of the
accumulator
bit
upon
execution
of
the
proper
SMK
instruction.
For
example,
a
one
in
an
accumulator
bit
permits
interrupts
from
the
associated
device, while a
zero
inhibits
interrupts
from
that
device.
There
are
two
SMK
instructions,
SMKO
and
SMKl.
Twelve
devices copy
the
accumula-
tor
on
SMKO
and
twelve
additional
devices copy on
SMKl
for
a
total of 24.
OCP
and
OTA
instructions
can be used
if
the
system
has
more
than 24 devices.
Figures 2-16 and 2-17
show
the gating
associated with
the
interrupt
flip-flop,
mask
flip-flop,
SMK
instruction,
and
SKS
instruction.
The
mask
flip-flop
copies
its
assigned accumulator
bit
when
the
KSMKL-
line
goes
active (ground)
with
the
appropriate address bus
level.
Since
the
KSMKL-
line
pulses during
SMKO
and
SMKl,
the
KDBOl-
or
KDB01+
line
is
used
to
determine which
instruction
is
in
progress.
Resetting
the
mask
flip-flop
is
done
conventionally with
Master
Clear,
Generation
of
the
interrupt
and
the
SMK
instruction
is
self
explanatory.
If
the
multiple
level
arrangement
is
not
needed,
the
mask
flip-flop,
the
hardware
to
set
it,
and
its
terms
in
the
interrupt
and
SKS
gates
may
be omitted.
Figure 2-16 shows
simplified
set
and
mask
flip-flop logic for the
SMK
instruction.
Figure 2-17 shows
the logic for gating
with
the
mask
flip-flop
using
the test line to
check
for interrupts.
USE THE DATA BUS
BIT
ASSOCIATED
WITH
THE
ASSIGNED
ACCUMULATOR
+
6V
BIT
A6240
KDB03-
KABOI-.
USE
THIS
SIGNAL
FOR
SMKl
KSMKL-
KXCLR
+
6V
-i-
4
USE
THIS
SIGNAL
'
FOR
SMKO
"\,
SMK +
>
MASTER CLEAR
—
MASK
FLOP
Figure
2-16.
SMK
Logic
2-19
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