A21 Control Assembly 05340-60021 - HP 5340A Operating And Service Manual

Model 5340A
Theory of Operation
4-234. U3A generates the "N Gate" qualifier for test #2 of the program (N Gate ? h a s been deter-
minted). When the count of U6 reaches 2, U13C(6) goes Low to drive the Q output of U l l A High.
This signal is a qualifier for test #7 of the program (N
the A6 Search Assembly information which indicates what range the instrument is on. U26,
19, and 20 are comparators that monitor the inverted outputs of U6 and U7 and compares them
with the output of U28.
4-235. The purpose of these circuits is to determine if N is within its limits. There are six possible
ranges of N for the 5340A. For each range, the instrument selects different passive components
so as to obtain a particular gain for the Input Phase Lock Loop. When the instrument is in local
control or in remote control and auto range, the signal at U14F pin 13 is High, enabling the N
checking circuits. When in remote control and in a particular octave range, the input to U14F
goes low disabling the N checking circuits. The six ranges are as follows:

4-236. A21 CONTROL ASSEMBLY 05340-60021

4-237. The control assembly controls the sequence of activity as a measurement is being made.
Refer to Figure 5-3 and note that actions are required and tests are made at various points in the
cycle. From the test results, decisions are made and these determine the path through the flow
chart.
4-238. U12 is a single pole 16 position switch that selects the desired test and feeds the result out
on pin 10. By placing binary 0 through 15 a n input pins 11, 13, 14, and 15, U12 selects tests 0
15. For example, having HHHL on pins 15, 14, 13, and 11, respectively, selects test #7. Pin 10
will then output the result of the N
common. When no test is desired, test #O is selected, giving a known output.
4-239. Similarly U13 is another single pole 16 position switch that selects one of 16 possible
actions. For example, placing HLHH into U13 pins 20, 21, 22, and 23, respectively, will select
action #11 by pulling U13(13) low. This sets flip-flop U5D-U5C to trigger one-shot U9B. C3 and
R6 control the time constant of the one-shot. The output of U9B is fed back to the test selector
U12 because the program requires a test for completion of this delay. U8, U5, and U14 are
flip-flops that store five of
areas to initiate a new action. U13(18, 19) are connected to the clock to synchronize actions with
the clock signal. UlOB and UlOA are flip-flops that indicate to U12 whether the main gate is
opened or closed. Gates U15C and U15A activate the front panel main gate annunciator
enough to be visible during short gate times. Note that when no action is desired (for example
when a test is being made), action #O is selected, which does nothing.
4-240. Read Only Memory (ROM) U4 is a storage device that will supply a predetermined 8-bit
output code for each of 32 possible input codes.
4-241. For example when program address HLLLH
the output on pins through 7 will be HLLHLLLL, respectively. This will select test #9 and action
1
(nothing). Other input codes similarly select other tests and actions. See U4 Truth Table.
,
4-242. U3 another ROM that outputs the program address of the next step in Figure 5-3. U1 is
is
a three pole two position syifch that connects, respectively, pins 12, 7 , and 4 to pins 13, 6, and 3
or pins 14, 5, and 2, denending on the test result logic level on pin 1. High selects pins 13, 6, and
3. The three switch lines are used with the two unswitched outputs of U3. The next clock pulse,
storage flip-flop U2 transfers this data to ROM's
4-48
N RANGE
64-256
32-64
16-32
8-16
4-8
2-4
2 test from
outputs of All
the U13.
is
,
U3
and U4.
2 ?). BCD to decimal decoder U28 decodes
1
2
3
4
5
6
the
of outputs of U13 are routed to other
on pins 14, 13, 12, 11, and 10, respectively,
27,
i