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Figure 4-21. Dual D-Type Edge Trigger Flip-Flops
T R U T H T A B L E (Each
I N P U T
O U T P U T S
L
L
L
N O T E S :
A. t ,
= bit t i m e after c l o c k pulse.
Low
asynchronous inputs:
input to preset sets
Low
input to clear sets
Preset and clear are independent
Figure
L
L
L
L
L
L
L
L
A
L
H
L = L O W V o l t a g e L e v e l
H I G H
H
Voltage L e v e l
X
E i t h e r
H I G H
o r L O W L o g i c L e v e l
C L E A R
1
C L E A R
to high level
low
to
level
of
clock
Four-Input Multiplexer
4-22.
9309
3 -
14
1 5
2
1
INPUTS
X
X
X
X
X
X
L
X
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
L
X
X
X
Model 5340A
Theory of Operation
1820-0596
2
2
2
2 0
CLOCK
PRESET
2 0
CLOCK
CLOCK
PRESET
I
I
1
I
10
1 0
G N D
CLOCK
P R E S E T
1820-0610
OUTPUTS
L
L.
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
4-15
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