Time Base Signal Selection - HP 5340A Operating And Service Manual

4-227. Sample rate time is then started. If U2A (pins
Rate control will determine the delay until the next measurements. Sample rate delay can be
terminated by a n ASCII "J".
4-228. The 5340A can be reset externally by supplying a n ASCII "H" to U25. This turns on U9C,
generating a reset through U9B. Moving resolution switch A27 between detents also generates a
reset through U9A if local (front panel control) operation
control, U8B detects this and disables U9A. The output of U14B is low for remote operations
and is used to light the front panel annunciator.
4-229. A20 TIME BASE ASSEMBLY, 05430-60073
4-230. The 10 MHz oscillator signal connects to A20 pin 5 and is divided from lo7 to 10' by decade
dividers U24, U22, U15, U8, U1, U9, and U16. U23 receives resolution control information a t
F, E, and D, and determines which decade divider output is selected as shown in
Table 4-2.
Resolution
Switch
Setting
100
10
1
4-231. UlOA receives the "Main Gate Control": (Action #4 of program) from the A21 Control
Assembly. This triggers the following sequence of events: UlOA pin 5 Low, UlOB pin 8 Low,
upon completion
switches U3B for 4 ms (the period of 250 Hz). U3B toggles when it receives the "N Gate" com-
mand (Action #14 of program) from the A21 Control Assembly. U25 is a pulse shaper whose in-
put frequency from A14 is N times 20 kHz. N equals the harmonic number of the phase lock loops.
"N" Counter Main Gate U4D lets through 20(103)*X
the time U3D is switched.
4-232. Divide by 10 circuit U12 and divide by 8 circuit U5A provide a n output which is 80N
N. U6 and U7 are binary counters that receive the N count after it has been inverted by U13D.
The outputs of U6 and U7 are inverted (one's complement) and fed to preset counters U21 and
U18.
4-233. As a n example of operation assume
U23 to select the 100 kHz signal. Assume also that the phase lock loops are locked on a n input
N
such that
440 x 4 x 10
output is N. U6 and U7 c o u d these pulses and output total in binary, which is 00010110 (Decimal
22). U13 and U14 invert.this to 11101001 (Decimal 233), which gets preset into U18 and U21.
_-
Next U18 and U21 are'released to count the 100 kHz signal.
be at 1111 1110 (Decimal 254), U17A pin 6 will go Low and U17B pin 8 will go High.
count, U l l B pin 8 will go Low, U4C pin 8 will go momentarily High and the main gate closes.
Table 4-2. Time Base Signal Selection
Binary Binary
=
Weight 4 Weight
L L
L H
L H
H L
H L
H H
H H
the above sequence. U5B
of
a signal of 22 (20 kHz)
1760 pu1se;s are passed through U4D. U12 and U5 drive the signal by 80 and the
and 2) are high, the front panel Sample
1
is
being used.
Equivalent
input of pins
Binary
= 2
Weight 1
(H = activated]
H
L
H
H
L
H
is a 12 circuit for the 500
N X 4(10-3) sec
that the resolution switch is set to
= 440 kHz. When U4D opens for 4 ms,
counts later
Model 5340A
Theory of Operation
If
the in remote
Selected
Signal
1
2
4
100 Hz pin 6
Hz output of U l and it also
80N pulses during
=
80
=
100 kHz causing
and U21 will
On the Nth
4-47