Introduction To Spi; Operation Of Spi - DEICO ONYX DE4001 User Manual

 ACK/NACK BIT: Each frame is followed by an ACK/NACK bit. If a frame was successfully
received, an ACK (0) bit is returned to sender from receiving device.
 Read/Write Bit: Read/Write bit indicates the read (1) or write (0) operation.
 Data Frames: Data frame is always 8 bits and sends the MSB first. After all data frames
are sent, master sends a stop condition to slave.
 Stop Condition: SDA line switches from low to high after SCL line switches from low
to high.
Table 1: Specs of I²C
Specification
Wires Used
Maximum Speed
Max Master
Max Slave

Introduction to SPI

Serial Peripheral Interface (SPI) is a synchronous serial communication. SPI devices are
connected via 4-wires that Master Output/Slave Input (MOSI), Master Input/Slave Output
(MISO), Slave Select (SS) and Clock (SCLK). SPI has a master/slave protocol and it support multi
slave operations.

Operation of SPI

SCLK, MOSI and MISO are shared by all devices on SPI Bus. Each slave device has its own SS
line. Master device generates the clock. When data is sent from master to a slave, it is sent
via MOSI. When data is sent from slave to master, it is sent via MISO. The master chooses
which slave it wants to talk to by setting the slave's SS line to low. In idle state, the SS line is
kept at high.
Table 2: Specs of SPI
Specification
Wires Used
Maximum Speed
Max Master
Max Slave
*In practice, the number of slaves is limited by the load capacitance of the system, which reduces the ability of
the master to accurately switch between voltage levels.
DE4001_USER MANUAL
Rev. No:0 Rev. Date: 05.08.2023
Figure 3: Sample bitstream of I²C
2
3.4Mbps
Unlimited
1008
4
10Mbps
1
Unlimited*
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Value
Value
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