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EVGA Z370 Classified K (134-KS-E379)
PCIe Slot Breakdown
PCIe Lane Distribution (All Socket 1151
processors are 16 lanes.)
PE1 – x1 (Gen2, x1 lanes from ASMedia PCIe multi-port switch)
PE2 – x16 (Gen3, x16 lanes from CPU, x8 shared with PE4)
PE3 – x1 (Gen2, x1 lanes from ASMedia PCIe multi-port switch)
PE4 – x16 (Gen3, x8 lanes from CPU, shares 8 of PE2's 16 lanes)
PE5 – x1 (Gen2, x1 lanes from ASMedia PCIe multi-port switch)
PE6 – x16 (Gen3, x4 lanes from PCH, x2 shared with SATA Ports 4/5)
o PE6 can run at x2 or x4. If x4 is enabled in the BIOS, SATA Ports 4/5
will be disabled. If x4 is disabled in the BIOS, SATA Ports 4/5 will be
enabled, and PE6 will run at x2.
M.2 Slot Breakdown
M.2 Lane Distribution
M.2 Key-M (80mm, Top) – x4
o M.2 Enable/Disable is set within the BIOS
M.2 Key-M (80mm, Bottom) – x4 (Shares with SATA Port 1)
o M.2 Enable/Disable is set within the BIOS
M.2 Key-E (32mm) – x1
o M.2 Enable/Disable is set within the BIOS
This motherboard does NOT have any lane replication via PLX; all lanes are
native and derived from CPU or PCH. This also allows for improved backwards
compatibility for Gen 2 devices.
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