15. Flash Memory; General Description; Features; Flash Programming And Erase - Philips P89LPC920 User Manual

80c51 8-bit microcontroller with two-clock core
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Philips Semiconductors
FLASH MEMORY

15. FLASH MEMORY

General description

The P89LPC920/921/922 Flash memory provides in-circuit electrical erasure and programming. The Flash can be read and
written as bytes. The Sector and Page Erase functions can erase any Flash sector (1 KB) or page (64 bytes). The Chip Erase
operation will erase the entire program memory. Five Flash programming methods are available. On-chip erase and write timing
generation contribute to a user-friendly programming interface. The P89LPC920/921/922 Flash reliably stores memory contents
even after 100,000 erase and program cycles. The cell is designed to optimize the erase and programming mechanisms. The
P89LPC920/921/922 uses V

Features

• Parallel programming with industry-standard commercial programmers
• In-Circuit serial Programming (ICP) with industry-standard commercial programmers.
• IAP-Lite allows individual and multiple bytes of code memory to be used for data storage and programmed under control of the
end application.
• Internal fixed boot ROM, containing low-level In-Application Programming (IAP) routines that can be called from the end
application (in addition to IAP-Lite).
• Default serial loader providing In-System Programming (ISP) via the serial port, located in upper end of user program memory.
• Boot vector allows user provided Flash loader code to reside anywhere in the Flash memory space, providing flexibility to the
user.
• Programming and erase over the full operating voltage range
• Read/Programming/Erase using ISP/IAP/IAP-Lite
• Any flash program operation in 2 ms (4ms for erase/program)
• Programmable security for the code in the Flash for each sector.
• > 100,000 typical erase/program cycles for each byte.
• 10-year minimum data retention.

Flash programming and erase

The P89LPC920/921/922 program memory consists 1 KB sectors. Each sector can be further divided into 64-byte pages. In
addition to sector erase and page erase, a 64-byte page register is included which allows from 1 to 64 bytes of a given page to
be programmed at the same time, substantially reducing overall programming time. Five mthods of programming this device are
available.
• Parallel programming with industry-standard commercial programmers.
• In-Circuit serial Programming (ICP) with industry-standard commercial programmers.
• IAP-Lite allows individual and multiple bytes of code memory to be used for data storage and programmed under control of
the end application.
• Internal fixed boot ROM, containing low-level In-Application Programming (IAP) routines athat can be called from the end
application (in addition to IAP-Lite).
• A factory-provided default serial loader, located in upper end of user program memory, providing In-System Programming
(ISP) via the serial port.

Using Flash as data storage: IAP-Lite

The Flash code memory array of this device supports IAP-Lite in addition to standard IAP functions. Any byte in a non-secured
sector of the code memory array may be read using the MOVC instruction and thus is suitable for use as non-volatile data stor-
age. IAP-Lite provides an erase-program function that makes it easy for one or more bytes within a page to be erased and pro-
2003 Dec 8
as the supply voltage to perform the Program/Erase algorithms.
DD
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User's Manual - Preliminary -
P89LPC920/921/922

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