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Schematic Diagrams
PS8625
Sheet 11 of 46
PS8625
B - 12 PS8625
3.3VS
3.3VS
VDDIO
L4
L1
HCB1005KF-121T20
HCB1005KF-121T20
C20
C18
C3
C4
0.47u_10V_Y 5V_04
1u_6.3V_X5R_04
0.47u_10V_Y 5V_04
4.7u_6.3V_X5R_06
8625_GNDA
1. Place the switching regulator inductor (L3) close to SW_OUT Pins (Pin15, Pin16).
2. The SW_OUT output traces should be as wide as possible.
3. The GNDX pins (Pin17, Pin18) should be connected to the main PCB ground plane, with the device GND pins of the PS8625 connected to separate GND island (GNDA) for the device.
The GND island (GNDA) should be connected to the main GND plane (GND) with a single-point connection by use of a wide PCB trace.
4. Place the 4.7uF decoupling Capacitor (C4) for VDDIOX close to VDDIOX pin.
5. The GND of the 4.7uF capacitor (C4) for VDDIOX should be placed close to the GND of 4.7uF capacitor (C5) behind Inductor.
JP1
6. Place the bead (L2) for VDDIOX close to PS8625.
*15mil_short_06
single
PCB
8625_GNDA
trace
eDP®ÉR9¤£¤W¥ó
R9
1K_04
HPD
6,12
EDP_HPD
eDP®ÉC17,C16¤£¤W¥ó
C17
0.1u_10V_X7R_04
DAUXn
6
DP_AUXN
DAUXp
C16
0.1u_10V_X7R_04
6
DP_AUXP
C7
eDP®ÉC15,C13¤£¤W¥ó
0.1u_16V_Y 5V_04
DRX0p
C15
0.1u_10V_X7R_04
6
EDP_TXP_0
DRX0n
C13
0.1u_10V_X7R_04
6
EDP_TXN_0
8625_GNDA
eDP®ÉC10,C8¤£¤W¥ó
DRX1p
C10
0.1u_10V_X7R_04
6
EDP_TXP_1
DRX1n
C8
0.1u_10V_X7R_04
6
EDP_TXN_1
A
C
23
L_BRIGHTNESS_R
RB751S-40C2
D2
BRIGHTNESS_EC_PS
A
C
36
BRIGHTNESS
*RB751S-40C2
D25
R18
*100K_04
Powe r On Configuration
GND
RLV_CFG
VDDIO
R5
*4.7K_04
R6
4.7K_04
RLV_CFG: LVDS color depth and data mapping selec tion, internal pull-down ~80K
L: 8-bit LVDS, VESA mapping
M: 8-bit LVDS, JEIDA mapping
H: 6-bit LVDS, both VESA and JEIDA mapping
RLV_LNK/GPIO0
12
RLV_LNK/GPIO0
36
SMC_EDP_CLK
36
SMD_EDO_DAT
RLV_LNK: LVDS single link or dual link s election, internal pull-down ~80K
L: Single link LVDS
H: Dual link LVDS
PANEL_VCC_EN
R14
*4.7K_04
VDDIO
I2C_ADDR: I2C Slav e address selection, internal pull-down ~80K
L: 0x10h~0x1Fh
H: 0x 90h~0x9Fh
L2
L3
BCNR3010C-2R2M
HCB1005KF-121T20
VDDIOX
SW_OUT
1
2
VDD12
VDDRX
C14
C359
C9
4.7u_6.3V_X5R_06
*4.7u_6.3V_X5R_06
1u_6.3V_X5R_04
8625_GNDA
VDDIO
C19
0.1u_16V_Y5V_04
8625_GNDA
U1
Note:
The decoupling caps C9, C15, C16, C17, C18, C21
s hall be close to the power pins as possible
DAUXn
1
42
DAUXn
TA1n
DAUXp
2
41
3
DAUXp
TA1p
40
8625_GNDA
GND
TB1n
DRX0p
4
39
DRX0p
TB1p
DRX0n
5
38
DRX0n
VDDIO
6
37
VDDRX
VDDRX
TC1n
DRX1p
7
36
PS8625
8
DRX1p
TC1p
35
DRX1n
DRX1n
TCK1n
9
34
C11
RST#
RST#
TCK1p
PD#
10
33
PD#
ENPVCC/I2C_ADDR
0.01u_16V_X7R_04
HPD
11
32
HPD
TD1n
PANEL_PWM
12
31
PWMO
TD1p
VDDIOX
13
30
VDDIOX
DDC_SDA
VDDIOX
14
29
VDDIOX
DDC_SCL
57
8625_GNDA
Epad
6-03-08625-030
C2
C1
Noe:
R13: LVDS output swing control
4.99K f or def ault swing, change the v alue f or swing adjust
3.3VS
8625_GNDA
8625_GNDA
Initial
Code
EEPROM
I2C_CFG = "H"
EEPROM f or Initial Code
I2C Address: 0xA0
Suggest minimum 2Kbit
3,6,9,10,12,19,20,21,22,23,24,26,27,28,29,30,31,32,33,34,35,36,37,41
R13
R15
10K_04
10K_04
PANEL_VCC_EN
PANEL_VCC_EN 12
ENBLT
ENBLT 12
C5
C6
PANEL_PWM
PANEL_PWM 12
1u_6.3V_X5R_04
2.2u_6.3V_X5R_04
LVDS®ÉR244,R247,R248,R249,R250,R251¤W¥ó
Close to J_LCD1
LVDS-L0N_L
R244
0_04
LVDS-L0N
LVDS-L0N 12
LVDS-L0P_L
LVDS-L0P
R247
0_04
LVDS-L0P 12
LVDS-L1N_L
LVDS-L1N
R248
0_04
LVDS-L1N 12
LVDS-L1P_L
LVDS-L1P
Single link
R249
0_04
LVDS-L1P 12
LVDS
LVDS-L2N
LVDS-L2N 12
LVDS-L2P
LVDS-L2P 12
LVDS-LCLKN_L
LVDS-LCLKN
R254
0_04
LVDS-LCLKN 12
LVDS-LCLKP_L
LVDS-LCLKP
R253
0_04
LVDS-LCLKP 12
LVDS-U0N
LVDS-U0N 12
LVDS-U0P
LVDS-U0P 12
LVDS-U1N
LVDS-U1N 12
LVDS-U1P
LVDS-U1P 12
LVDS-U2N
LVDS-U2N 12
LVDS-U2P
LVDS-U2P 12
LVDS-UCLKN
LVDS-UCLKN 12
LVDS-UCLKP
LVDS-UCLKP 12
LVDS-U0N
LVDS-U0P
LVDS-U1N
LVDS-U1P
VDDIO
P_DDC_CLK
P_DDC_CLK 12
LVDS-U2N
P_DDC_DATA
P_DDC_DATA 12
LVDS-U2P
LVDS-UCLKN
C12
LVDS-UCLKP
0.1u_16V_Y5V_04
PANEL_VCC_EN
8625_GNDA
To LVDS Connector
P_DDC_DATA
P_DDC_CLK
eDP®ÉR115,R167,R168,R212,R228,R229¤W¥ó
Close to C17
DP_AUXN
R155
*0_04
LVDS-LCLKN_R
LVDS-LCLKN_R 12
Close to C16
DP_AUXP
LVDS-LCLKP_R
R167
*0_04
LVDS-LCLKP_R 12
Close to C13
EDP_TXN_0
LVDS-L0N_R
R168
*0_04
LVDS-L0N_R 12
Close to C15
EDP_TXP_0
LVDS-L0P_R
R212
*0_04
LVDS-L0P_R 12
Close to C8
EDP_TXN_1
LVDS-L1N_R
R228
*0_04
LVDS-L1N_R 12
Close to C10
EDP_TXP_1
R229
*0_04
LVDS-L1P_R
LVDS-L1P_R 12
12
VDDIO
3.3VS
Dual link
LVDS
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