Processor 3/7- (Ddr3 - Clevo W650SR Service Manual

Table of Contents

Advertisement

Processor 3/7- (DDR3)

9
M_A_DQ[63:0]
Haswell rPGA EDS
M_A_DQ0
AR15
SA_DQ_0
M_A_DQ1
AT14
SA_DQ_1
M_A_DQ2
AM14
SA_DQ_2
AN14
M_A_DQ3
SA_DQ_3
M_A_DQ4
AT15
SA_DQ_4
M_A_DQ5
AR14
SA_DQ_5
M_A_DQ6
AN15
AM15
SA_DQ_6
M_A_DQ7
SA_DQ_7
M_A_DQ8
AM9
SA_DQ_8
M_A_DQ9
AN9
AM8
SA_DQ_9
M_A_DQ10
AN8
SA_DQ_10
M_A_DQ11
SA_DQ_11
M_A_DQ12
AR9
SA_DQ_12
M_A_DQ13
AT9
SA_DQ_13
M_A_DQ14
AR8
SA_DQ_14
AT8
M_A_DQ15
SA_DQ_15
M_A_DQ16
AJ9
SA_DQ_16
M_A_DQ17
AK9
SA_DQ_17
M_A_DQ18
AJ6
AK6
SA_DQ_18
M_A_DQ19
SA_DQ_19
M_A_DQ20
AJ10
SA_DQ_20
M_A_DQ21
AK10
SA_DQ_21
M_A_DQ22
AJ7
AK7
SA_DQ_22
M_A_DQ23
SA_DQ_23
M_A_DQ24
AF4
SA_DQ_24
M_A_DQ25
AF5
SA_DQ_25
M_A_DQ26
AF1
AF2
SA_DQ_26
M_A_DQ27
SA_DQ_27
M_A_DQ28
AG4
SA_DQ_28
M_A_DQ29
AG5
SA_DQ_29
M_A_DQ30
AG1
AG2
SA_DQ_30
M_A_DQ31
SA_DQ_31
M_A_DQ32
J1
SA_DQ_32
M_A_DQ33
J2
SA_DQ_33
6.5 / 8 / 16
M_A_DQ34
J5
H5
SA_DQ_34
2VIA
M_A_DQ35
SA_DQ_35
M_A_DQ36
H2
3700mils
SA_DQ_36
M_A_DQ37
H1
SA_DQ_37
M_A_DQ38
J4
H4
SA_DQ_38
M_A_DQ39
SA_DQ_39
F2
M_A_DQ40
SA_DQ_40
M_A_DQ41
F1
SA_DQ_41
M_A_DQ42
D2
D3
SA_DQ_42
M_A_DQ43
SA_DQ_43
D1
M_A_DQ44
SA_DQ_44
M_A_DQ45
F3
SA_DQ_45
M_A_DQ46
C3
B3
SA_DQ_46
M_A_DQ47
SA_DQ_47
B5
M_A_DQ48
SA_DQ_48
M_A_DQ49
E6
SA_DQ_49
M_A_DQ50
A5
D6
SA_DQ_50
M_A_DQ51
SA_DQ_51
M_A_DQ52
D5
SA_DQ_52
M_A_DQ53
E5
SA_DQ_53
M_A_DQ54
B6
A6
SA_DQ_54
M_A_DQ55
SA_DQ_55
E12
M_A_DQ56
SA_DQ_56
M_A_DQ57
D12
SA_DQ_57
M_A_DQ58
B11
A11
SA_DQ_58
M_A_DQ59
SA_DQ_59
E11
M_A_DQ60
SA_DQ_60
M_A_DQ61
D11
SA_DQ_61
*15mil_short_06
M_A_DQ62
B12
A12
SA_DQ_62
R393
M_A_DQ63
SA_DQ_63
V_VREF_CA_DIMM
V_SM_VREF
AM3
SM_VREF
V_DDR_WR_VREF01
F16
SA_DIMM_VREFDQ
V_DDR_WR_VREF02
F13
SB_DIMM_VREFDQ
C566
1u_6.3V_X5R_04
3 OF 9
V_VDDQ_DIMM
R75
0_04
¾aDIMMºÝÂ\©ñ & TRACE¥[¼e
R93
1K_1%_04
Q4
*AO3402L
S
D
V_DDR_WR_VREF01
R72
R97
*1K_04
1K_1%_04
DRAMRST_CNTRL 3,4,21
Haswell Processor 3/7 ( DDR3 )
10
M_B_DQ[63:0]
U26C
AC7
RSVD_AC7
U4
4.5/ 4.5/ 16
M_A_CLK_DDR#0 9
SA_CK_N_0
V4
7 / 12 / 25
SA_CK_P_0
M_A_CLK_DDR0 9
AD9
2VIA
SA_CKE_0
M_A_CKE0 9
U3
M_A_CLK_DDR#1 9
SA_CK_N_1
V3
4.5/ 4.5/ 16
M_A_CLK_DDR1 9
SA_CK_P_1
AC9
7 / 12 / 25
M_A_CKE1 9
SA_CKE_1
U2
2VIA
SA_CK_N_2
V2
4.5/ 4.5/ 16
SA_CK_P_2
AD8
7 / 12 / 25
SA_CKE_2
U1
2VIA
SA_CK_N_3
V1
4.5/ 4.5/ 16
SA_CK_P_3
AC8
7 / 12 / 25
SA_CKE_3
2VIA
M7
SA_CS_N_0
M_A_CS#0 9
L9
7 / 12 / 25
SA_CS_N_1
M_A_CS#1 9
M9
2VIA
SA_CS_N_2
M10
SA_CS_N_3
M8
M_A_ODT0 9
SA_ODT_0
L7
7 / 12 / 25
SA_ODT_1
M_A_ODT1 9
L8
2VIA
SA_ODT_2
L10
SA_ODT_3
V5
M_A_BS0 9
SA_BS_0
U5
11.5 / 9 / 16
SA_BS_1
M_A_BS1 9
AD1
2VIA
SA_BS_2
M_A_BS2 9
V10
VSS
U6
SA_RAS
M_A_RAS# 9
U7
11.5 / 9 / 16
SA_WE
M_A_WE# 9
U8
2VIA
M_A_CAS# 9
SA_CAS
M_A_A[15:0] 9
V8
M_A_A0
SA_MA_0
AC6
M_A_A1
SA_MA_1
V9
M_A_A2
SA_MA_2
U9
M_A_A3
SA_MA_3
AC5
M_A_A4
SA_MA_4
AC4
M_A_A5
SA_MA_5
AD6
M_A_A6
SA_MA_6
AC3
M_A_A7
SA_MA_7
AD5
M_A_A8
SA_MA_8
AC2
M_A_A9
11.5 / 9 / 16
SA_MA_9
V6
M_A_A10
2VIA
SA_MA_10
AC1
M_A_A11
SA_MA_11
AD4
M_A_A12
SA_MA_12
V7
M_A_A13
SA_MA_13
AD3
M_A_A14
SA_MA_14
AD2
M_A_A15
SA_MA_15
M_A_DQS#[7:0] 9
AP15
M_A_DQS#0
SA_DQS_N_0
AP8
M_A_DQS#1
SA_DQS_N_1
AJ8
M_A_DQS#2
SA_DQS_N_2
AF3
M_A_DQS#3
SA_DQS_N_3
J3
M_A_DQS#4
6.5 / 6.5 / 16
SA_DQS_N_4
E2
M_A_DQS#5
2VIA
SA_DQS_N_5
C5
M_A_DQS#6
SA_DQS_N_6
C11
M_A_DQS#7
SA_DQS_N_7
M_A_DQS[7:0] 9
AP14
M_A_DQS0
SA_DQS_P_0
AP9
M_A_DQS1
SA_DQS_P_1
AK8
M_A_DQS2
SA_DQS_P_2
AG3
M_A_DQS3
SA_DQS_P_3
H3
M_A_DQS4
6.5 / 6.5 / 16
SA_DQS_P_4
E3
M_A_DQS5
2VIA
SA_DQS_P_5
C6
M_A_DQS6
SA_DQS_P_6
C12
M_A_DQS7
SA_DQS_P_7
V_VDDQ_DIMM
R100
0_04
Q3
*AO3402L
V_DDR_WR_VREF02
S
D
MVREF_DQ_DIMMA 9
R106
C140
*1K_04
1K_1%_04
0.1u_10V_X7R_04
DRAMRST_CNTRL 3,4,21
Haswell rPGA EDS
U26D
M_B_DQ0
AR18
AG8
SB_DQ_0
RSVD
M_B_DQ1
AT18
Y4
SB_DQ_1
SB_CKN0
M_B_CLK_DDR#0 10
AM17
AA4
M_B_DQ2
SB_DQ_2
SB_CK0
M_B_CLK_DDR0 10
M_B_DQ3
AM18
AF10
M_B_CKE0 10
SB_DQ_3
SB_CKE_0
M_B_DQ4
AR17
Y3
M_B_CLK_DDR#1 10
SB_DQ_4
SB_CKN1
M_B_DQ5
AT17
AA3
M_B_CLK_DDR1 10
AN17
SB_DQ_5
SB_CK1
AG10
M_B_DQ6
M_B_CKE1 10
SB_DQ_6
SB_CKE_1
M_B_DQ7
AN18
Y2
SB_DQ_7
SB_CKN2
M_B_DQ8
AT12
AA2
AR12
SB_DQ_8
SB_CK2
AG9
M_B_DQ9
AN12
SB_DQ_9
SB_CKE_2
Y1
M_B_DQ10
SB_DQ_10
SB_CKN3
M_B_DQ11
AM11
AA1
SB_DQ_11
SB_CK3
M_B_DQ12
AT11
AF9
SB_DQ_12
SB_CKE_3
M_B_DQ13
AR11
SB_DQ_13
AM12
P4
M_B_DQ14
SB_DQ_14
SB_CS_N_0
M_B_CS#0 10
M_B_DQ15
AN11
R2
M_B_CS#1 10
SB_DQ_15
SB_CS_N_1
M_B_DQ16
AR5
P3
SB_DQ_16
SB_CS_N_2
M_B_DQ17
AR6
P1
AM5
SB_DQ_17
SB_CS_N_3
M_B_DQ18
SB_DQ_18
M_B_DQ19
AM6
R4
M_B_ODT0 10
SB_DQ_19
SB_ODT_0
M_B_DQ20
AT5
R3
M_B_ODT1 10
SB_DQ_20
SB_ODT_1
M_B_DQ21
AT6
R1
AN5
SB_DQ_21
SB_ODT_2
P2
M_B_DQ22
SB_DQ_22
SB_ODT_3
M_B_DQ23
AN6
R7
M_B_BS0 10
SB_DQ_23
SB_BS_0
M_B_DQ24
AJ4
P8
M_B_BS1 10
SB_DQ_24
SB_BS_1
M_B_DQ25
AK4
AA9
M_B_BS2 10
AJ1
SB_DQ_25
SB_BS_2
M_B_DQ26
SB_DQ_26
M_B_DQ27
AJ2
R10
SB_DQ_27
VSS
M_B_DQ28
AM1
R6
M_B_RAS# 10
SB_DQ_28
SB_RAS
M_B_DQ29
AN1
P6
M_B_WE# 10
AK2
SB_DQ_29
SB_WE
P7
M_B_DQ30
SB_DQ_30
SB_CAS
M_B_CAS# 10
M_B_DQ31
AK1
SB_DQ_31
M_B_DQ32
L2
R8
M_B_A0
SB_DQ_32
SB_MA_0
M_B_DQ33
M2
Y5
M_B_A1
L4
SB_DQ_33
SB_MA_1
Y10
M_B_DQ34
M_B_A2
SB_DQ_34
SB_MA_2
M_B_DQ35
M4
AA5
M_B_A3
SB_DQ_35
SB_MA_3
M_B_DQ36
L1
Y7
M_B_A4
SB_DQ_36
SB_MA_4
M_B_DQ37
M1
AA6
M_B_A5
L5
SB_DQ_37
SB_MA_5
Y6
M_B_DQ38
M_B_A6
SB_DQ_38
SB_MA_6
M5
AA7
M_B_DQ39
M_B_A7
SB_DQ_39
SB_MA_7
M_B_DQ40
G7
Y8
M_B_A8
SB_DQ_40
SB_MA_8
M_B_DQ41
J8
AA10
M_B_A9
G8
SB_DQ_41
SB_MA_9
R9
M_B_DQ42
M_B_A10
SB_DQ_42
SB_MA_10
G9
Y9
M_B_DQ43
M_B_A11
SB_DQ_43
SB_MA_11
M_B_DQ44
J7
AF7
M_B_A12
SB_DQ_44
SB_MA_12
M_B_DQ45
J9
P9
M_B_A13
G10
SB_DQ_45
SB_MA_13
AA8
M_B_DQ46
M_B_A14
SB_DQ_46
SB_MA_14
J10
AG7
M_B_DQ47
M_B_A15
SB_DQ_47
SB_MA_15
M_B_DQ48
A8
SB_DQ_48
M_B_DQ49
B8
M_B_DQS#[7:0] 10
A9
SB_DQ_49
AP18
M_B_DQ50
M_B_DQS#0
SB_DQ_50
SB_DQS_N_0
M_B_DQ51
B9
AP11
M_B_DQS#1
SB_DQ_51
SB_DQS_N_1
M_B_DQ52
D8
AP5
M_B_DQS#2
SB_DQ_52
SB_DQS_N_2
M_B_DQ53
E8
AJ3
M_B_DQS#3
D9
SB_DQ_53
SB_DQS_N_3
L3
M_B_DQ54
M_B_DQS#4
SB_DQ_54
SB_DQS_N_4
E9
H9
M_B_DQ55
M_B_DQS#5
SB_DQ_55
SB_DQS_N_5
M_B_DQ56
E15
C8
M_B_DQS#6
SB_DQ_56
SB_DQS_N_6
M_B_DQ57
D15
C14
M_B_DQS#7
M_B_DQS[7:0] 10
A15
SB_DQ_57
SB_DQS_N_7
AP17
M_B_DQ58
M_B_DQS0
SB_DQ_58
SB_DQS_P_0
B15
AP12
M_B_DQ59
M_B_DQS1
SB_DQ_59
SB_DQS_P_1
M_B_DQ60
E14
AP6
M_B_DQS2
SB_DQ_60
SB_DQS_P_2
M_B_DQ61
D14
AK3
M_B_DQS3
A14
SB_DQ_61
SB_DQS_P_3
M3
M_B_DQ62
M_B_DQS4
SB_DQ_62
SB_DQS_P_4
M_B_DQ63
B14
H8
M_B_DQS5
SB_DQ_63
SB_DQS_P_5
C9
M_B_DQS6
SB_DQS_P_6
C15
M_B_DQS7
V_VDDQ_DIMM
SB_DQS_P_7
4 OF 9
R390 0_04
R389
1K_1%_04
Q17
*AO3402L
V_SM_VREF
S
D
10/22
R372
R395
*1K_04
R81
1K_1%_04
SUSB# 22,36,37,38
1K_1%_04
MVREF_DQ_DIMMB 10
R74
C127
0.1u_10V_X7R_04
3,5,9,10,40
V_VDDQ_DIMM
Schematic Diagrams
Sheet 4 of 46
Processor 3/7-
(DDR3)
M_B_A[15:0] 10
V_VREF_CA_DIMM 9,10
C568
0.1u_10V_X7R_04
Processor 3/7- (DDR3) B - 5

Advertisement

Table of Contents
loading

Table of Contents