Introduction:
This technical note describes 24-Lead ADN2871/ADN2873 laser diode driver evaluation kit. The
evaluation kit provides an AC-coupled, differential optical evaluation platform for the device
ADN2871/ADN2873, called device under test (DUT) below. The evaluation kit supports two DUT
operation modes to set laser optical average power (Pav) and extinction ratio(ER) outputs: Voltage setting
mode and Resistor Setting mode. The voltage settings mode uses a micro-converter's DAC voltage outputs
to DUT pin PAVREF and ERREF. The resistor setting mode uses potentiometers connected to DUT pin
PAVSET and ERSET, respectively.
This document describes how to configure the evaluation kit to either voltage or resistor setting mode to
correctly set the DUT optical average power and extinction ratio driving capabilities. The document
contains:
1.
Board Description
2.
Capacitor Selection
3.
Quick Start Operation using Voltage setpoint Calibration
4.
Quick Start Operation using Resistor setpoint Calibration
5.
Description of board settings
6.
BOM and Schematic of board
7.
Laser to PCB footprints
8.
Discussions
Board Description:
The EVALZ-ADN2871/ADN2873 board provides on-board configurable jumpers to setup the DUT in
either voltage or resistor setting mode. The board is convenient to evaluate the DUT optical performance
worked with various differential TOSA lasers, and to optimize, debug, and confirm new optical transmitter
design.
The DUT is a 3.3V, APC (average power control) single loop capable, laser diode driver device, available
for data rate support from 50Mbps up to 4.25Gbps. To evaluate the DUT performance, a suitable coax laser
diode must be soldered onto the evaluation board. A photo-current, produced from the laser companion
monitor photo diode, MPD, is fed into the DUT to close the APC loop. This board is configured for
differential ended coaxial lasers only. LEDs on board present the DUT power supply, and FAIL alarm
status.
Capacitor Selection
The EVALZ-ADN2871/ADN2873 needs only one high isolation impedance capacitor: PAVCAP for the
stable APC loop control. The bandwidth of APC control loop is centered between a maximum bandwidth to
avoid data dependency and loop instability, and a minimum bandwidth to ensure compliance to SFP start
up time. The following equations can be used to determine the nominal values of the average power loop
capacitor (PAVCAP) for a design based on the laser slope efficiency and the required average output
power. There is a +/-15% tolerance allowed for the capacitors value calculated.
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