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8808A
Users Manual
Event Status and Event Status Enable Registers
The ESR assigns specified events to specific bits. (See Figure 4-3 and Table 4-6.) When a
bit in the ESR is set to 1, the event that corresponds to that bit occurred after the register
was last read or cleared. For example, if bit 3 (DDE) is set to 1, a device-dependent error
has occurred.
4-12
6
2
7
5
4
3
&
&
&
&
&
&
6
2
7
5
4
3
RQS
Service
7
Request
Generation
MSS
&
7
Figure 4-2. Overview of Status Data Structures
Standard
1
0
Event Status Register
Read Using *ESR?
&
&
Standard
Event Status Enable
1
0
Register
Read Using *ESE?
Write to Using *ESE
6
3
2
1
ESB MAV
&
&
&
&
&
5
4
3
2
1
Queue
Not-Empty
Output Queue
Read by Serial Poll
Status Byte Register
0
Read Using *STB?
&
Service Request
0
Enable Register
Read Using *SRE?
Write to Using *SRE
aam21f.eps
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