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4.2.15. PORT P
Reset status
PORT
Function
PP0
After reset
Input Port
Output Port
AINA08 (Note)
T32A04INA0
T32A04INC0
T32A04INB1
PP1
After reset
Input Port
Output Port
AINA09 (Note)
T32A04INB0
T32A04INC1
T32A04INA1
PP2
After reset
Input Port
Output Port
AINA10 (Note)
T32A05INA0
T32A05INC0
T32A05INB1
PP3
After reset
Input Port
Output Port
AINA11 (Note)
T32A05INB0
T32A05INC1
T32A05INA1
PP4
After reset
Input Port
Output Port
AINA12 (Note)
T32A06INA0
T32A06INC0
T32A06INB1
PP5
After reset
Input Port
Output Port
AINA13 (Note)
T32A06INB0
T32A06INC1
T32A06INA1
PP6
After reset
Input Port
Output Port
AINA14 (Note)
INT10b
T32A07INA0
T32A07INC0
T32A07INB1
Table 4.16 Port P registers setting
PORT
Input/Output
Type
[PPDATA]
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
0/1
Output
0/1
Input
FTU5
0/1
Input
FTU4
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Input
FTU1
0/1
Control register
[PPCR]
[PPFRn]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
0
0
0
0
0
1
0
0
0
0
0
0
[PPFR2]
0
[PPFR3]
0
[PPFR5]
58 / 82
TXZ+ Family
TMPM4N Group(1)
Input/Output Ports
[PPOD]
[PPPUP]
[PPPDN]
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
[PPIE]
0
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
1
1
2021-01-18
Rev. 1.0
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