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SYS-405 User Manual
Name
Layout
LVDS &
Backlight
[J12]
LVDS
Configuration
[JP5]
6
2014-07-21
VIDEO
Flat panel displays connect to the SYS-405 motherboard at J12. The board supports LVDS resolutions up to 1920x1200
at 24 bits per pixel (Bpp). A USB Touchscreen interface connection is located at J14. Panel color mode selection for 6-or
8-bits per pixel is configured at JP4. All resolutions are panel hardware dependent.
Connector Reference
PCB Connector
HIRose/DF19G-30P-1H(54)
Mating Connector
HIRose DF19G -30S-1C(05)
Crimp Connector
DF19A Series
Configuration for LVDS, LVDS output swing, and clock frequency for I
depicted in the layout illustration to the left and configuration table below.
Connector Reference
PCB Connector
Samtec/ TMM-104-01-G-D-SM-P-TR
Jumper
Samtec/2SN-BK-G
Jumper Kit, 2MM
N/A
Additional Information
MFR/Part Number
2
C is made at JP5 using the selection options
MFG/Part Number
WinSystems Part Number
G650-3030-0F0
N/A
N/A
WinSystems Part Number
G650-2008-0G0
G201-0002-005
KIT-JMP-G-200
Page 9 of 39
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