Table 614: Addresses For The Page Register - Datatech Enterprises Apex 386/25 User Manual

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The addresses for the page register are as follows:

Table 614: Addresses for the Page Register

Address generation for the DMA channels is as follows:
Table 6-15: Address Generation for DMA Channels 3 Through 0
Note: To generate the addressing signal "byte high enable" (BHE),
invert address line AO.
Source
Address
Table 6-16: Address Generation for DMA Channels 7 Through 5
Note: The BHE and A0 addressing signals are forced to a logical 0.
DMA channel addresses do not increase or decrease through page
boundaries (84KB for channels 0 through 3 and 128KB for channels 5
through 7).
Page Register l/O Hex Address
DMA Channel 0
DMA Channel 1
DMA Channel 2
DMA Channel 3
DMA Channel 5
DMA Channel 6
DMA Channel 7
Refresh
For DMA Channels 7 through 5
DMA Page Registers
A23 Al7
0067
0063
0061
0062
0068
0089
000A
008F
8237A - 5
Al6 A1
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Chapter 6: Appendix 25