Block Diagram And Outline Of Circuit - Sony BETACAM SX DNV-5 Maintenance Manual

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Outline of Circuit
(1) Video input system and digital signal system
(DVP-1 (1/2) board, DVP-2 board, IF-634 board,
and drum assembly)
. Signal processing during recording
The Y/R-Y/B-Y signals supplied from the camera are
A/D converted. The A/D converted R-Y and B-Y signals
are multiplexed and produce the C signal, and the
resultant C signal and Y signal are multiplexed by a TBC
buffer. In the PAL mode, setup of the parallel video data
output from the TBC buffer is removed.
The parallel video data is compressed to a data rate of
approximately 1/10 using an SX encoder after the VITC
signal is added. The compressed video data is input to
the ECC encoder where an outer ECC is added to the
video data and the compressed video data is track-
interleaved.
The serial audio data (A/D DATA 1/2 and 3/4) supplied
from the TC-80 board is also input to the ECC encoder
where an outer ECC is added and the audio data is field-
shuffled. The video data and audio data are multiplexed
and are inner-ECC-encoded by the ECC encoder. The
resultant data is then sent to the drum as the four-channel
parallel record data.
The Betacam SX recorder records the video and audio
signals on magnetic tape in a Betacam SX format.
The Betacam SX recorder uses the four rotary heads
which have an azimuth angle in the opposite direction to
each other, and are paired. Every rotation of the drum
records the four helical tracks. Every five rotations of the
drum i.e., the twenty helical tracks record the four frame
data.
* The Betacam SX format of the PAL system records
the two frame data with three rotations, i.e., twelve
helical tracks.
DNV-5
Section 4

Block Diagram and Outline of Circuit

. Signal processing during playback
The four-channel parallel PB data supplied from the
drum is inner-corrected by the inner ECC decoder. The
parallel PB data is then deinterleaved and sent to the
outer ECC decoder where the video data is outer-
corrected and sent to the SX decoder.
The SX decoder performs the bit rate reduction decoding
of the playback video data so that the original data rate is
restored. The errors that cannot be corrected by the ECC
decoder are sent to the memory where separate error
correction scheme is performed.
The playback parallel video data is then D/A converted
and produce the VBS signal.
The VBS signal feeds the VBS OUT connector, and also
feeds the TEST OUT connector and viewfinder after a
character signal is added.
Audio data is outer-corrected, error-corrected, then
converted of its clock rate using FIFO memory. The
audio data is sent to the audio data processor in the form
of two-channel serial audio data (CONFI AU 1/2 and
3/4).
The NTSC Betacam SX system is equipped with a five-
field sequence generator which controls the five-field
sequence of playback audio data.
The digital data processing in each IC is performed
under communication with the system control CPU.
4-1

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