HP 8340B Manual page 464

HP 8410C INTERFACE CONNECTOR J17
(As
seen from rear panel)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
LSTTL
Logic Levels
INPUTS
Low
£.0
6
Vcd,
High 2:2
0
Vdc
OUTPUTS Low
^
0 4
Vdc,
High
£24
Vdc
2
Control
of input
lines can
be accomplished by contact closure to ground
for a
logic low level and open circuit for
a
logic high level
3
Open Collector Output
0
Mnemonic
Z-AXIS
LALTSEL
LSSP
+5.2V
MUTE
EXT TRIG
PEN LIFT
NEG BLANK
LRETRACE
LALTEN
GND
LSTEPUP
841 OB TRIG
14
15 16 17 18 19 20 21 22 23 24 25
''
/000000000000\
-
(
0000000000000)
1 2
3 4
5 6
7
8 9
10 11 12
13
^
Description1
No Connection
LOW=
Marker Pulse
(±5V)
No Connection
Alternate Sweep (LSTTL)
LOW=Stop
Forward Sweep Request
+5
Volts (100mA
Max.)
No
Connection
LOW=RF
Blank Request
(LSTTL)
HIGH
"External
Trigger Sweep (LSTTL)
HIGH
=
Pen Lift
No Connection
No Connection
No Connection
LOW=Blanking
Pulse
(-5V)
No
Connection
LOW "Retrace
Strobe (LSTTL)
LOW
=
Alternate
Sweep Enable (LSTTL)
No Connection
Digital Ground/Pen
Lift
Return
No Connection
No Connection
LOW
=
Step Advance (SW to
GND)
(0.4V)
No Connection
HIGH=Synchronizer Trigger (LSTTL)
No Connection
In/Out^
Output
Output
Input/Output3
Output
Input
Input
Output3
Output
Output
Output
Input
Output
Figure 2-3.
HP 8410 INTERFACE
Connector Signal/Pin Configuration
2-8 Installation
HP 8340B/41B