Theory Of Operation; The Address Bus And Data Bus; Low Instrument Preset (Lips) - HP 8340B Manual

Controller Section
Theory of Operation
THE ADDRESS BUS AND DATA BUS
The instrument
has
a
16-bit
I/O data bus (DB 0-15)
and a
5-bit
I/O address bus (ADR 0-4) that runs
throughout the instrument. The I/O data
bus
is bidirectional, sending and receiving data from various
digital circuits.
LOW INSTRUMENT PRESET (LIPS)
When
you turn the instrument
on,
or press
[INSTR PRESET], LIPS
(low
instrument preset)
is
gener¬
ated. This signal initiates
several events
in the controller section:
Overrides the
A59 assembly's
ability to shut down the processor
Disables access to
RAM
Resets the instrument processor and the display processor
Activates
all
front panel
LEDs
Activates the
16
self test LEDs on the A60 assembly
When LIPS
is released, the instrument controller performs
a
self test that:
Checks the instrument processor internal registers
Partially
checks
RAM
Checks ROM
Checks the I/O address bus (ADR
1-5)
Checks
the I/O
data
bus (DB 0-15)
Verifies the calibration data check sum (see service introduction)
Checks the analog-to-digital converter
This circuit, located on the
A27
level control
assembly,
is essentially an internal voltmeter that
allows the instrument processor to monitor several DC
levels
in the instrument (e.g. modulation
level, sweep voltage,
ALC
level).
If
the self test is
initiated by an
instrument preset, the instrument sets all front panel functions to
a
preset condition, and
is
ready to begin operation.
HIGH POWER UP (HPUP)
When
you
turn
the power switch
on,
HPUP
remains low
until
the
power
supplies stabilize,
then
it
goes
high, resetting the instrument
processor to restore previous instrument settings (stored in
RAM)
after
self test completes.
F-2
Controller Section Theory of Operation
HP 8340B/41B