Register 0X03 Synth_Mode (2 Bytes); Register 0X10 Rf_Frequency - SIGNALCORE SC5312A User Manual

6 ghz direct iq demodulator
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Register 0x03 SYNTH_MODE (2 Bytes)

This register configures the PLL loop gain of the local oscillator synthesizers. It also enables or disables
faster tuning of the YIG based oscillator of LO1.
Bytes written 2
Bytes read 1
Bits
Type
Name
[1:0]
WO
Loop Gain
[2]
WO
Fast Tune
[7:3]
WO
Unused
[7:0]
RO
Read back byte

Register 0x10 RF_FREQUENCY

This register tunes the device to the input RF frequency.
Bytes written 8
Bytes read 1
Bits Type
Name
[47:0]
W
Frequency word
[48]
LO
[55:49]
W
Unused
[7:0]
RO
Read back byte
©2013
Width
Description
0 = Low loop gain, improves phase noise > 50 kHz
2
1 = Normal loop gain
2 = High loop gain, improves phase noise < 50 kHz
0 = Turns fast tune off, default
1
1 = Turns fast tune on, close in phase noise may
degrade
5
Set to zeros
8
Read 1 byte back is required for PXIe and RS232
Width
Description
Frequency word in milli-Hz (mHz); mHz used for
48
future compatibility
Set to 1 to apply value directly to the first LO. The
1
RF frequency value is unchanged.
7
Set to zeros
8
Read 1 byte back is required for PXIe and RS232
Hardware Registers
17
Rev 2.1

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