Gigabyte MB12-CE0 User Manual page 59

Intel xeon d-1700 processor server motherboard
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Parameter
Memory RAS Configuration
(Note1) This item appears when ADDDC Sparing is set to Enabled.
(Note2) This item is configurable when ADDDC Sparing is set to Enabled.
(Note3) This item appears when Patrol Scrub is set to Enabled.
Description
Press [Enter] to configure advanced items.
Mirror Mode
Š
– Mirror Mode will set entire 1LM memory in system to be
mirrored, consequently reducing the memory capacity by half.
Enables the Mirror Mode will disable the XPT Prefetch.
– Options available: Disabled, Full Mirror Mode, Partial Mirror
Mode. Default setting is Disabled.
Correctable Error Threshold
Š
– Correctable Error Threshold (0x01-0x7fff) used for sparing, and
leaky bucket.
– Press the <+> / <-> keys to increase or decrease the desired
values.
Trigger SW Error Threshold
Š
– Enable/Disable Sparing trigger SW Error Match Threshold.
– Options available: Disabled, Enabled. Default setting is
Disabled.
Leaky bucket time window based interface
Š
– Options available: Disabled, Enabled. Default setting is
Disabled.
Leaky bucket low bit
Š
– Configures leaky bucket low bit (1-63).
– Press the <+> / <-> keys to increase or decrease the desired
values.
Leaky bucket high bit
Š
– Configures leaky bucket high bit (1-63).
– Press the <+> / <-> keys to increase or decrease the desired
values.
ADDDC Sparing
Š
– Options available: Disabled, Enabled. Default setting is
Disabled.
Enable ADDDC Error Injection
Š
– Options available: Disabled, Enabled. Default setting is
Enabled.
Column Correction Disable
Š
– Options available: Disable, Enable. Default setting is Disable.
Patrol Scrub
Š
– Options available: Disabled, Enabled, Enable at End of POST.
Default setting is Disabled.
Patrol Scrub Interval
Š
– Selects the number of hours (1-24) required to complete full
scrub. A value of zero means auto.
BIOS Setup
- 59 -
(Note1)
(Note2)
(Note3)

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