Specifications - Analog Devices Super Sequencer ADM1168 Manual

ADM1168

SPECIFICATIONS

1
VH = 3.0 V to 14.4 V , VPx = 3.0 V to 6.0 V
Table 1.
Parameter
POWER SUPPLY ARBITRATION
VH, VPx
VPx
VH
VDDCAP
C
VDDCAP
POWER SUPPLY
Supply Current, I , I
VH VPx
Additional Currents
All PDOx FET Drivers On
Current Available from VDDCAP
EEPROM Erase Current
SUPPLY FAULT DETECTORS
VH Pin
Input Impedance
Input Attenuator Error
Detection Ranges
High Range
Midrange
VPx Pins
Input Impedance
Input Attenuator Error
Detection Ranges
Midrange
Low Range
Ultralow Range
VXx Pins
Input Impedance
Detection Ranges
Ultralow Range
Absolute Accuracy
Threshold Resolution
Digital Glitch Filter
REFERENCE OUTPUT
Reference Output Voltage
Load Regulation
Minimum Load Capacitance
PSRR
1
, T = −40°C to +85°C, unless otherwise noted.
A
Min Typ Max
3.0
6.0
14.4
2.7 4.75 5.4
10
4.2 6
1
2
10
52
±0.05
6 14.4
2.5 6
52
±0.05
2.5 6
1.25 3
0.573 1.375
1
0.573 1.375
±1
8
0
100
2.043 2.048 2.053
−0.25
0.25
1
60
Rev. 0 | Page 4 of 28
Unit Test Conditions/Comments
V Minimum supply required on one of the VH, VPx pins
V Maximum VDDCAP = 5.1 V typical
V VDDCAP = 4.75 V
V Regulated LDO output
μF Minimum recommended decoupling capacitance
mA VDDCAP = 4.75 V, PDO1 to PDO8 off
mA VDDCAP = 4.75 V, PDO1 to PDO6 loaded with 1 μA each,
PDO7 to PDO8 off
mA Maximum additional load that can be drawn from all PDO
pull-ups to VDDCAP
mA 1 ms duration only, VDDCAP = 3 V
kΩ
% Midrange and high range
V
V
kΩ
% Low range and midrange
V
V
V No input attenuation error
MΩ
V No input attenuation error
% Internal reference VREF error + DAC nonlinearity +
comparator offset error
Bits
μs Minimum programmable filter length
μs Maximum programmable filter length
V No load
mV Sourcing current
mV Sinking current
μF Capacitor required for decoupling, stability
dB DC