Analog Devices Super Sequencer ADM1168 Manual page 5

Parameter
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge Pump) Mode
(PDO1 to PDO6)
Output Impedance
V
OH
I
OUTAVG
Standard (Digital Output) Mode
(PDO1 to PDO8)
V
OH
V
OL
2
I
OL
I 2
SINK
R
PULL-UP
2
I (VPx)
SOURCE
Three-State Output Leakage Current
Oscillator Frequency
DIGITAL INPUTS (VXx, A0, A1)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance
Programmable Pull-Down Current,
I
PULL-DOWN
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
Input High Voltage, V
IH
Input Low Voltage, V
IL
2
Output Low Voltage, V
OL
SERIAL BUS TIMING
Clock Frequency, f
SCLK
Bus Free Time, t
BUF
Start Setup Time, t
SU;STA
Stop Setup Time, t
SU;STO
Start Hold Time, t
HD;STA
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
r
SCL, SDA Fall Time, t
f
Data Setup Time, t
SU;DAT
Data Hold Time, t
HD;DAT
Input Low Current, I
IL
SEQUENCING ENGINE TIMING
State Change Time
1
At least one of the VH, VPx pins must be ≥3.0 V to maintain the device supply on VDDCAP.
2
Specification is not production tested but is supported by characterization data at initial product release.
Min Typ Max Unit
500 kΩ
11 12.5 14 V
10.5 12 13.5 V
20 μA
2.4 V
4.5 V
V − 0.3 V
PU
0 0.50 V
20 mA
60 mA
16 20 29 kΩ
2 mA
10 μA
90 100 110 kHz
2.0 V
0.8 V
−1 μA
1 μA
5 pF
20 μA
2.0 V
0.8 V
0.4 V
400 kHz
1.3 μs
0.6 μs
0.6 μs
0.6 μs
1.3 μs
0.6 μs
300 ns
300 ns
100 ns
250 ns
1 μA
10 μs
Rev. 0 | Page 5 of 28
Test Conditions/Comments
I = 0 μA
OH
I = 1 μA
OH
2 V < V < 7 V
OH
V (pull-up to VDDCAP or VPx) = 2.7 V, I
PU
V to VPx = 6.0 V, I = 0 mA
PU OH
V ≤ 2.7 V, I = 0.5 mA
PU OH
I = 20 mA
OL
Maximum sink current per PDO pin
Maximum total sink for all PDO pins
Internal pull-up
Current load on any VPx pull-ups, that is, total source
current available through any number of PDO pull-up
switches configured onto any one VPx pin
V = 14.4 V
PDO
All on-chip time delays derived from this clock
Maximum V = 5.5 V
IN
Maximum V = 5.5 V
IN
V = 5.5 V
IN
V = 0 V
IN
VDDCAP = 4.75 V, T = 25°C, if known logic state is required
A
I = −3.0 mA
OUT
See Figure 27
V = 0 V
IN
ADM1168
= 0.5 mA
OH