Denon DNP-730AE Service Manual page 53

PCM1795 (IC511)
PCM1795
SLES248 – MAY 2009 ........................................................................................................................................................................................................
PCM1795 Block Diagram
TERMINAL
NAME NO.
LRCK
AGND1 19
BCK
AGND2 24 Audio
DATA
Data Input
AGND3L 27
AGND3R 16
BCK 6
RST
DATA 5
DGND 8
I L+ MDO 25
OUT
I L– 26
MDI
OUT
I R+ 17
MC
OUT
Function
I R– 18
Control I/F
MS
OUT
I 20
REF
LRCK 4
MSEL
MC 12
MDI 11
MDO 13
ZEROL
MS 10
Detect
ZEROR
MSEL 3
RST 14
(1) Schmitt-trigger input, 5-V tolerant.
(2) Schmitt-trigger input, 5-V tolerant.
(3) Schmitt-trigger input and output. 5-V tolerant input. In I
CMOS output.
(4) Schmitt-trigger input and output. 5-V tolerant input and CMOS output.
Copyright © 2009, Texas Instruments Incorporated
PIN CONFIGURATION
ZEROL 1
ZEROR 2
3
MSEL
LRCK 4
DATA 5
6
BCK
SCL 7
DGND 8
V
9
DD
10
MS
MDI 11
12
MC
MDO 13
14
RST
FUNCTIONAL BLOCK DIAGRAM
Table 1. TERMINAL FUNCTIONS
I/O
— Analog ground (internal bias)
— Analog ground (internal bias)
— Analog ground (left channel DACFF)
I/F
— Analog ground (right channel DACFF)
I Bit clock input
x8
I Serial audio data input
Oversampling
Digital Filter
— Digital ground
and
O Left channel analog current output+
Function Control
O Left channel analog current output–
O Right channel analog current output+
O Right channel analog current output–
— Output current reference bias pin
I Left and right clock (f
I Mode control clock input
I Mode control data input
I/O Mode control readback data output
System
Zero
Clock
I/OI Mode control chip-select input
Manager
2
I I C/SPI select
(2)
I Reset ; active low
Product Folder Link(s):
DB PACKAGE
SSOP-28
(TOP VIEW)
V 2L
28
CC
27 AGND3L
I
26
OUT
I
25
OUT
AGND2
24
V 1
23
CC
V
22
COM
V
21
COM
I
20
REF
19 AGND1
I
18
OUT
I
17
OUT
16 AGND3R
V 2R
15
CC
DESCRIPTION
Current
Segment
DAC
(1)
(2)
Advanced
Bias
Segment
and V
DAC
REF
Modulator
Current
Segment
DAC
(2)
) input
S
(2)
(2)
(3)
Power Supply
(4)
; active low
(2)
; active low SPI select
2
C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a
PCM1795
53
L-
L+
L
R
R-
R+
I L-
OUT
I L+
OUT
I/V and Filter
V L
COM
I
REF
V R
COM
I R-
OUT
I R+
OUT
I/V and Filter
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V L
OUT
V R
OUT
7