M52347Fp (Ic4006), Sync Separator; El4332C (Ic4007), Rgb Switch, 6Db Amp; Ohm Driver; Video Signal Flow - Sony VPL-VW12HT Service Manual

3-3-1-4. M52347FP (IC4006), SYNC SEPARATOR

This IC performs sync separation mainly for computer
system signals and for signals other than those of the
VIDEO, HDTV and DTV systems.

3-3-1-5. EL4332C (IC4007), RGB Switch, 6dB Amp,

75 Ohm Driver

Switches the video system, HDTV and DTV system
signals that have been converted to RGB and the computer
system RGB signals and outputs them to the C board.

3-3-2. Video signal Flow

3-3-2-1. VIDEO Signal Flow
The VIDEO and Y/C signals are fed respectively into pin 3
of NJM2533M (IC4022, IC4024 and IC4025). The select-
ed VIDEO/S-VIDEO signal passes through the IC (switch)
so that C-VIDEO emerges from CN406 (11), Y from (13)
and C from (15).(These are sent to the B board via the BM
board.)
The 15k-COMPONENT signal and 15k-RGB signal are
input from INPUT-A or INPUT-B, and after selection by
RY4001, RY4002 and RY4003 are output from CN4006
(19), (21) and (23). (These are sent to the B board via the
BM board.) Of the signals processed on the B board, Y is
input from CN4005 pin 25, U from pin 23 and V from pin
21. These signals pass through DRC pre-filters FL4006
(Y), FL4005 (U) and FL4004 (V) and are then fed into
pins 63, 31 and 50 of AD converter TLC5733A (IC4029).
Following this, they are subjected to algorithm processing
in CXD20900 (IC4033), D/A conversion and then output
as double speed frequency color difference signals from
pin 105 (Y), pin 113 (U) and pin 109 (V).
After passing through post filters FL4003 (Y), FL4002 (U)
and FL4001 (V) these signals are fed into pin 23 (Y), pin
22 (U) and pin 21 (V) of RGB matrix CXA2101 (IC4013).
CXA2101 (3-1-3.) converts the signals to RGB signals and
outputs R from pin 35, G from pin 37 and B from pin 39.
These output RGB signals pass through buffers Q4021,
Q4022 and Q4023 and are then selected by EL4332C
(IC4007) which serves as a switch and 75 ohm driver IC.
R is then output from CN4004 (A1, B1), G from (A3, B3)
and B from (A5, B5).
VPL-VW12HT
3-3-2-2. HDTV/DTV (YPbPr, RGB) Double Speed
Component (YUV) Signal Flows
The double speed component signals are input from
INPUT-A or INPUT-B and after selection by RY4001,
RY4002 and RY4003 pass though buffers Q4015, Q4016
and Q4017 before being fed to pins 11, 10 and 9 of RGB
matrix CXA2101 (IC4013). CXA2101 (3-1-3.) converts
the signals to RGB signals and outputs R from pin 35, G
from pin 37 and B from pin 39. These output RGB signals
pass through buffers Q4021, Q4022 and Q4023 and are
then selected by EL4332C (IC4007) which serves as a
switch and 75 ohm driver IC. R is then output from
CN4004 (A1, B1), G from (A3, B3) and B from (A5, B5).

3-3-2-3. Computer Signal (RGB) Flows

The computer system signals (RGB) are input from
INPUT-A or INPUT-B and after selection by RY4001,
RY4002 and RY4003 are fed to EL4332C (IC4007) which
serves as a switch and 75 ohm driver IC. After being
selected by this IC, R is output from CN4004 (A1, B1), G
from (A3, B3) and B from (A5, B5).

3-3-3. SYNC Processing Flows

3-3-3-1. When VIDEO Signals and 15k
COMPONENT Signals are Processed
The H/V SYNC processed and output from the B board is
passed via the BM board to CN4005 from which it is input
from pin 19 (H) and pin 17 (V). The H/V SYNC is then
passed through buffers Q4033 and Q4032 and fed to the
DRC block.
CXD2095AQ (IC4033) outputs double speed processed H
SYNC from pin 98 and V SYNC from pin 99. Following
this, the sync is fed into CXA2101 (IC4013) via pin 7 (H)
and pin 8 (V) and is then output from pins 29 and 28.
The output H-SYNC is inverted by IC4014 and is then fed
to IC4012. Here noise is removed before it is output from
pin 7. It is then fed to IC4011 for wave shaping and then to
pin 17 of IC4009. Here CLP pulses are output from pin 5
of IC4012, inverted by IC4014, wave shaped by IC4011
and input to pin 15 of IC4009.
The V-SYNC is wave shaped by IC4014, then after
inversion by IC4039 it is fed to pin 13 of IC4009. In
IC4009 switching is performed with SYNC from the
computer system and 3.3 V level conversion is performed.
H is then output from CN4004 (A7, B7), V from (A9, B9)
and CLP from (A11, B11).
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