Sony VPL-VW12HT Service Manual page 47

3-4-3-5. CXA3512R (IC5601, 5602, 5701, 5702,
5801, 5802), LCD Driver
To draw the odd pixels and even pixels, each RGB channel
has 2 LCD panel drivers.
The signal input by VIDEO_I is amplified by a factor of
about 2 by an inverting amplifier, and is sampled and held
by the S/H pulse generated by the internal TG. Following
this it is further amplified by about 1.5 times and is output to
the panel with separate timings SH1 to 3 and SH4 to 6.
Centered on the SIGCEN voltage, the signal is folded with
FRP timing so as to give a signal whichis inverted every 1H.
CAL_R is an input terminal for a refresh signal used to
cancel the offset between output channels, and is set by the
DAC.
MCLK and MCLK are dot clock inputs and because this
system is 2 para, input 40MHz.
They can input either PECL or TTL signals.
Control of sample and hold phase is performed by
POSCTR1, POSCTR2 and DLYCTR.
3-4-3-6. LCX037 LCD Panel
This LCD panel uses the dot-line inversion drive method
and dramatically reduces cross talk (window bands) in the H
direction.
The effective pixel area measures 768 pixels vertically by
1. Dot-line Inversion Panel Write
( i )
1 2 3
1 L L L
H H H H H H H H H H H H H H H H H H H H H H H H H
2
L L L
3
H H H H H H H H H H H H H H H H H H H H H H H H H
4
When scanning in the direction of the arrow. Dots 2, 4,
6, 8, 10 and 12 of the line 1 and dots 1, 3, 5, 7, 9 and 11 of
line 2 are written simultaneously. During the next timing
period dots 14, 16, 18, 20 and 24 of line 1 and dots 13, 15,17,
19, 21 and 23 of line 2 are simultaneously written.
After writing dot 1366, a start is made on writing lines 2 and
VPL-VW12HT
4 5 6 7 8 9 10 11
L L L L L L L L
L L L L L L L L
POSCTR used 4 value discrimination, so two ports allow 4 x
4 (i.e. 16) settings.
Control of POSCTR allows 16 dot variation but the do
lineinversion panel can operate correctly only every other
time, so actually only 8 settings are possible.
Input of 3 to 5V to DLYCTR allows phase to be
continuously varied within one dot by up to 360∞.
DIRCTR is a terminal for setting the left/right scan direction
and inputs either RGT or RGT.
SID_IN is an input terminal for the pre-charge signal
waveform. As the input waveform for the
step is suitable, so a DC value is input under DAC control.
The signal input from SID_IN is folded with FRP or FRP
and output from SID_O.
In the case of the pre-charge signal, a certain current flow is
required, so rather than connect SID_O directly to the panel,
it is connected via a push-pull buffer.
When VCOMOFF is at 0 volts, VCOMOUT outputs a
potential equal to the voltage input to SIGCNT.
Furthermore, when the voltage at VCOMOFF is raised to
10V, VCOMOUT outputs approximately SIGCNT - 3V.
1366 horizontally, but in addition the panel has margins 4
pixels wide on the left and right, and 2 pixels wide at the top
and bottom containing dummy pixels.
12 13 14 15 16 17 18 19
L L L L L L L L
L L L L L L L L
3. L and H indicate polarity. Inspection of the two lines
which are simultaneously written reveals that though the
lines do not match, the dots written are of opposite polarity
(dot inversion).
Owing to use of the CXD3504R (IC5403) line memory, the
first line is delayed by 1H relative to the second line.
panel a single
20 21 22 1366
L L L L L L
L L L L L L
3-17