The Hardware - Architecture, Controls And Connectors; Dcs 992 Architecture; Figure 1 - Internal Clocking, Agen Generators And Aes3 Output Matrix; Aes3 - DCS 992 User Manual

dCS 992 User Manual
dCS Ltd
T H – A
HE ARDWARE

dCS 992 Architecture

TCXO 1

TCXO 2
TCXO
Control
TCXO 3
optional
TCXO 4
optional
Manual part no: DOC063992 iss 2A1
Contact on + 44 1799 531 999
dCS
(inside the UK replace + 44 with 0)
, C
RCHITECTURE
The dCS 992 is capable of generating some extremely complex clocking
arrangements. To help understand some of its features, the architecture is
described below.
To SGENs (1-6)
Figure 1 – Internal clocking, AGEN generators and AES3 output
Fs = Sample Rate, Φ = Phase, M = AES3 message, S = Signal (tone)
Manual for Software Version 2.0x
C
ONTROLS AND ONNECTORS
AES generators
AGEN 1
F , O, M, S
s
AGEN 2
F , O, M
s
AGEN 3
F , O, M
s
AGEN 4
F , O, M
s
matrix
Page 8
January 2001
AES3 outputs
AES 1
output
Drag and drop
selection
AES 2
output
AES 3
output
AES 4
output
file 063992ma2a1.pdf available from website
email to: more@dcsltd.co.uk
web site: www.dcsltd.co.uk