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A
L
D VA N C E D
D
EVICES
1. Introduction
The system power budget of a low power system has two components: active and low power mode. Active mode
periods include an active core executing code or a larger number of active peripherals. In low power mode periods,
the core enters a sleep state and fewer peripherals are active.
Figure 1. Defining the Power Budget—Active and Low Power Modes
SiM3L1xx devices have several features to address reducing power consumption in all operational modes to
achieve a longer product lifetime in battery-operated systems. This document addresses each of these features
and provides guidelines for achieving low power consumption in a variety of configurations and applications.
2. Key Points
This key topics of this document are as follows:

How to reduce active mode time and power consumption

How to reduce low power mode power consumption

Measuring the low power modes on an SiM3L1xx MCU card

General power-saving tips
3. Relevant Documentation
Precision32™ Application Notes are listed on the following website: www.silabs.com/32bit-appnotes.

AN666: Usage Guide for e SiM3U1xx,SiM3C1xx, and SiM3L1xx DMA and DTM Modules

AN720: Precision32™ Optimization Considerations for Code Size and Speed

AN667: Getting Started with the Silicon Labs Precision32 IDE

AN670: Getting Started with the Silicon Labs Precision32 AppBuilder
Rev. 0.1 9/12
P
OW
OWER
Active Mode
Copyright © 2012 by Silicon Laboratories
T
ECHNIQUES FOR
Low Power
Mode
AN725
SiM3L1
XX
AN725

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Summary of Contents for Silicon Laboratories AN725

  • Page 1  AN720: Precision32™ Optimization Considerations for Code Size and Speed  AN667: Getting Started with the Silicon Labs Precision32 IDE  AN670: Getting Started with the Silicon Labs Precision32 AppBuilder Rev. 0.1 9/12 Copyright © 2012 by Silicon Laboratories AN725...
  • Page 2 AN725 4. Reducing Active Mode Power Consumption In active mode, the core is fetching instructions from memory and executing those instructions, and a large number of peripherals may be active at once. This section discusses ways to reduce the SiM3L1xx device power consumption in active mode (Normal, PM1, PM4, or PM5).
  • Page 3 AN725 4.4. Code Dependency In addition to dynamic clock management, the power consumption of the SiM3L1xx device will vary with the type of code the core executes. For example, if the core executes a complex math routine with branches, the pipeline will miss every time a branch is taken and new instructions must be fetched.
  • Page 4 AN725 4.5. Adaptive Voltage Scaling SiM3L1xx devices have scalable LDOs powering the digital and memory modules on the device. These LDO outputs are factory calibrated to 1.8 V to handle all process and temperature variations, but this voltage is often much higher than the minimum voltage required by the digital and memory circuits.
  • Page 5 AN725 4.6. DC-DC Load and Power Efficiency The DCDC0 module on SiM3L1xx devices is a dc-dc buck converter with an input range of 1.8 to 3.8 V and an output range of 1.25 to 3.8 V. The efficiency of this regulator changes based on load and the converter configuration, as shown in Figure 4.
  • Page 6 AN725 To configure the converter for loads greater than 15 mA: 1. Power switch size set to 3 (PSMD = 3) 2. Synchronous mode enabled (ASYNCEN = 0) 3. Minimum pulse width disabled (MINPWSEL = 0) Table 1 shows a summary of these settings for each load configuration.
  • Page 7 AN725 5. Reducing Power Consumption in Low Power Modes In low power mode, the device core halts and the number of active peripherals typically reduces to the minimum required by the application (i.e., real time clock). This section discusses techniques to reduce the SiM3L1xx device power consumption in low power modes (PM2, PM3, PM6, and PM8).
  • Page 8 AN725 5.1.7. Power Mode 5 Power Mode 5 is the same as PM1 with a slower AHB clock source selected. The core executes code from RAM instead of flash. The power consumption of the device in PM5 is slightly less than PM4.
  • Page 9 AN725 Table 2. SiM3L1xx Power Modes Mode Description Mode Entrance Mode Exit  Core operating at full speed Normal  Code executing from flash  Core operating at full speed Power Mode 1 Execute code from RAM Jump to code in flash (PM1) ...
  • Page 10: Measuring Power

    AN725 5.2. Measuring Power This section discusses the hardware setup and code required to reproduce the power specifications reported by the SiM3L1xx data sheet. 5.2.1. Hardware Setup To measure the power on the SiM3L1xx MCU Card with a fixed 3.3 V VBAT: 1.
  • Page 11 AN725 To measure the power on an SiM3L1xx MCU Card with a varying VBAT: 1. Connect a USB Debug Adapter to the 10-pin CoreSight connector (J14). 2. Remove the three shorting blocks from J7. 3. Remove the JP2 Imeasure shorting block.
  • Page 12 AN725 5.2.2. Configuring a Device for Normal (PM0) and Power Mode 4 In Normal (PM0) and Power Mode 4, the device executes code from flash. The only difference between PM0 and PM4 is the core clock speed (fast and slow, respectively).
  • Page 13 AN725 section attribute tag to it. __attribute__ ((__section__(".data.name"))) This tag will result in a warning indicating that code is being placed in the data section, but this warning can be ignored. As an example, placing the PowerModes_2_or_6() function in RAM would look like: __attribute__ ((__section__(".data.pm2_or_6")))
  • Page 14 AN725 5.2.4. Configuring a Device for Power Modes 2 and 6 For Power Modes 2 and 6, the core halts and no longer executes code, but the active peripherals still run from the APB clock. The only difference between PM2 and PM6 is the APB clock speed (fast and slow, respectively).
  • Page 15 AN725 5.2.5. Configuring a Device for Power Mode 3 Fast Wake In PM3 Fast Wake, all clocks are stopped except for a very low frequency clock (RTC0OSC or LFOSC0) that allows the core to wake up faster than standard PM3.
  • Page 16 AN725 5.2.6. Configuring a Device for Power Mode 8 PM8 is the lowest power mode where all clocks are stopped and only the PM8 peripherals are available. The RAM banks do not have retention enabled by default, so firmware must enable each bank to retain data through PM8.
  • Page 17 AN725 To measure the data sheet numbers using an SiM3L1xx MCU Card and the AN725_PowerMode_8 example: 1. Configure the SiM3L1xx MCU Card according to the instructions in Section “5.2.1. Hardware Setup”. 2. Open the AN725_PowerMode_8 example in either Keil µVision or the Precision32 IDE.
  • Page 18 AN725 5.3. Low Power Mode Charge Pump The SiM3L1xx devices feature a low-power, voltage-halving charge pump used to power most of the functions operating in the lowest power mode (PM8). This charge pump always powers the low-frequency and 32 kHz crystal oscillators.
  • Page 19 AN725 5.3.1. Monitor The SiM3L1xx devices include a low-power voltage monitor that compares the output of the low power mode charge pump against a factory-trimmed 0.95 V reference voltage. This monitor can serve as an interrupt, a PM8 wakeup source, and a reset source. It is highly recommended that this monitor be enabled and used as a wakeup or interrupt source.
  • Page 20 AN725 5.3.3. Dynamic Charge Pump Drive Impedance The low power mode charge pump supports four drive impedance settings. For applications requiring aggressive PM8 current reduction, these settings can be adjusted dynamically to minimize the total low power mode current consumed. This adjustment could be performed by measuring the charge pump load current as described in Section 5.3.2 before each entry into PM8 and setting the appropriate drive impedance.
  • Page 21 AN725 5.4. LCD For applications that use the LCD0 module, the SiM3L1xx devices have several features that help reduce power consumption. 5.4.1. Segment Resetting Each segment of an LCD can be modeled as a capacitor in the order of tens of pF. A typical load current is 1 nA per segment per pF, so a 160-segment LCD with 50 pF per segment can draw 8 µA of load current.
  • Page 22 AN725 Phase COM0 COM1 COM2 COM3 Figure 9. LCD Common Waveforms For a 4 MUX LCD architecture, Figure 9 demonstrates that three of the four commons are at the same potential in every phase. This potential is 2 V for the even phases and 1 V for the odd phases. Instead of the traditional segment switching method, the SiM3L1xx devices reset the segments to 2 V for even phases and 1 V for odd phases before switching to the next segment potential to reduce the overall load current of the LCD.
  • Page 23 AN725 5.4.2. Contrast Modes The LCD0 module features four contrast modes: bypass, minimum, constant, and auto-bypass. The selection of the contrast mode is governed by the application requirements and LCD specifications. The power consumption of these modes will vary due to the internal charge pump and resistor string that generates the VLCD voltage.
  • Page 24 AN725 In constant contrast mode, the VLCD voltage is held constant at all times, regardless of the voltage on VBAT. When VBAT is above the threshold set by the VBMTH field, the LCD charge pump regulates to the contrast level set by the CTRST field using a variable resistor.
  • Page 25 AN725 5.4.3. Refresh Rate The LCD0 module on SiM3L1xx devices includes a programmable refresh rate by setting the CLKDIV bits in the CLKCONTROL register. The LCD multiplexor mode must be taken into account when determining the prescaler value. The LCD power consumption will scale proportionally with the refresh rate. For maximum power savings, choose the slowest LCD refresh rate and the minimum LCD0 clock frequency that provides acceptable performance for the application.
  • Page 26 AN725 For example, to locate the stack at address 0x2000_6000: PROVIDE(_vStackTop = 0x20006000); Instead of editing the link scripts file, the stack offset change can be made inside the IDE: 1. Right-click on the project_name in the Project Explorer view.
  • Page 27 AN725 6. General Power-Saving Tips 6.1. Pins Placing any unused pins in analog mode using the PBSTD module (PBMDSEL.x = 0) disables the drivers and weak pull-ups on the pin. The pin will float and consume little power. For pins that are connected to external hardware, place the pins in analog mode if possible. If this is not possible, place the pins in a natural state that will consume no power.
  • Page 28 Trademark Information Silicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress®...