Chipset Block Diagram - Supermicro H12SSG-AN6 User Manual

H12SSG-AN6 User's Manual

Chipset Block Diagram

5
JAIOM1
D
JPCIE_ED1 Slim SAS Slim SAS JPCIE_ED2
x8 x9
[7:0] [15:8]
JPCIE8 JPCIE1
JSXB1
Slim SAS Slim SAS
x9 x4
CPU P2 [7:0] CPU P1 [7:4]
CPU P0 [15:8]
JPCIE9 JPCIE2
Slim SAS Slim SAS
x9 x8
CPU P2 [15:8] CPU P1 [15:8]
JPCIE7
Slim SAS
x8
CPU P0 [7:0]
C
JSXB2
B
JPCIE5
CPU G0 [7:0]
Slim SAS
x8
JPCIE6
Slim SAS
x8
CPU G0 [15:8]
A
5
Note: This is a general block diagram and may not exactly represent the features on your
motherboard. See the previous pages for the actual specifications of your motherboard.
4
H12SSG-AN6
COM1
VGA
HEADER
DDR4
BMC
SPI
AST2600
BMC ROM
CPLD
BIOS ROM
TPM
CPU P1 [15:0]
CPU P2 [15:0]
CPU P0 [15:0]
A
B
C
D
J4 J3 J2 J1
CPU G1 [15:0]
CPU G0 [15:0]
Rear I/O
Dedicated
LAN
UID UID
BTN LED
COM
4
Figure 1-3. Chipset Block Diagram
14
3
AMD SP3 Rome Rev. 1.00
IPMI LAN
RJ45
PHY
RTL8211F
Rear
USB_0_HSD[0,1]
2X
USB 3.0
CPU WAFL [1]
LPC
SPI
USB1_HSD[2:3]
+ USB1_SS[2:3]
CPU
EPYC Processor (AMD Socket SP3)
JSXB3
CPU G3 PCIe[7:0] / SATA[37:30]
CPU G3 [15:8]
USB3.0
VGA AIOM
USB3.0
3
2
JPCIE3
Slim SAS
x8
CPU P3 [7:0]
JPCIE4
Slim SAS
x4
CPU P3 [11:8]
M.2 Conn
M key
JM2B
JM2A
CPU P3 [15:12]
CPU P1 [3:0]
CPU P3 [15:0]
E
F
G
H
J5 J6 J7 J8
JPCIE10 JPCIE_ED3
Slim SAS Slim SAS
x8 x8
CPU G2 [7:0] [7:0]
JPCIE11
Slim SAS Impel JMP3
x8
x8
CPU G2 [15:8]
2
01 Block Diagram------- SS
02 SMBus Diagram------- SS
03 Power Rail Diagram-- SS
04 Clock Tree Diagram-- SS
05 Reset Diagram------- SS
06 P0-MEM_CH_A_B------- SS
07 P0-MEM_CH_C_D------- SS
08 P0-MEM_CH_E_F------- SS
09 P0-MEM_CH_G_H------- SS
10 P0-DIMM-CH-A-------- SS
11 P0-DIMM-CH-B-------- SS
12 P0-DIMM-CH-C-------- SS
13 P0-DIMM-CH-D-------- SS
14 P0-DIMM-CH-E-------- SS
15 P0-DIMM-CH-F-------- SS
16 P0-DIMM-CH-G-------- SS
17 P0-DIMM-CH-H-------- SS
18 P0-PCIe & SATA & GOP ---
19 P0-PCIe & SATA ---
20 P0-USB & LPC & UART ---
21 P0-CLK/RESET/SPI/SMB ---
22 P0-SVID/WAFL/JTAG ---
23 P0-POWER----------- SSW
24 P0-GROUND---------- SSW
25 P0 BYPASS CAP
26 P0-DIMM-BYPASS-CAP
27 P0-HW-STRAPs------------
28 P0-CLOCK BUFF-------X12D
29 Blank (SATA)
30 Blank (USB)
31 USB Rear I/O ------ SSW
32 PCI-E CPU0 P0&P1_LUIO
33 Blank (PCIe)
34 PCI-E CPU0 P2_OCP
35 PCI-E CPU0 P3_SlimSAS
36 PCI-E CPU0 G0&G1_RUIO
37 Blank (PCIe)
38 PCI-E CPU0 G2A&G2B_Impel
39 PCI-E CPU0 G2C&G2D_M2A/M
40 PCI-E CPU0 G3_RUIO
41 FAN & RT1 & RT2 ------
42 Front Panlel --
43 HDT --
44 CPLD --
45 PCIe Reset
46 SMBus --
47 BMC TPM/INTRUDER/VGA --
48 BMC AST2600 DDR4/ESPI/SM
49 BMC AST2600 SPI/UART/MAC
50 BMC AST2600 VGA/FAN/ADC/
51 BMC AST2600 POWER/GND
52 BMC- BMC EXRST/RSMRST
53 Blank (NCSI)
54 BMC VOLTAGE RAGULATOR
55 BMC LAN RTL8211F-CG
56 BMC- COM & ROM & SD
57 Blank
58 P0_VDDCR_CPU_RUN VRM
59 P0_VDDCR_CPU_RUN Phase 1
60 P0_VDDCR_CPU_RUN Phase 5
61 P0_VDDCR_SOC_RUN VRM
62 P0_VDDCR_SOC_RUN Stage
63 P0 ABCD VDDIO_VPP VRM
64 P0 ABCD VDDIO Stage
65 P0 ABCD VPP
66 P0 EFGH VDDIO VRM
67 P0 EFGH VDDIO Stage
68 P0 EFGH VPP
69 P0 VTT
70 P0 VDD1.8 RUN & DUAL
71 P0 SOC DUAL
72 Blank
73 POWER CONNECTOR
74 HOT SWAP CONTROLLER ---
75 12V DUAL Control ---
76 +VDD_5_DUAL ---
77 +VDD_33_DUAL ---
78 +VDD_5_RUN ---
79 +VDD_33_RUN ---
80 OCP ISOLATION
81 OCP POWER
82 Manual Parts
83 History