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read command after receiving it.
RAS Active Time (tRAS) (6T)
This item allows you to set the amount of time a RAS can be kept open for
multiple accesses. High figures will improve performance.
RAS Precharge Time (tRP) (3T)
This is the duration of the time interval during which the Row Address Strobe
signal to a DRAM is held low during normal Read and Write Cycles. This is
the minimum interval between completing one read or write and starting an-
other from the same (non-page mode) DRAM. Techniques such as memory
interleaving, or use of Page Mode DRAM are often used to avoid this delay.
Some chipsets require this parameter in order to set up the memory configura-
tion properly. The RAS Precharge value is typically about the same as the
RAM Access (data read/write) time.
RAS to CAS Delay (tRCD) (3T)
This is the amount of time a CAS is performed after a RAS. The lower the
better, but some DRAM does not support low figures.
DRAM Addr/Cmd Rate (AUTO)
This option allows you to set the lead off DRAM read and write cycles. When
set to Delay 1T, memory read/write commands are sent one clock cycle be-
hind the memory address. When set to Normal, read/write and memory
address commands are sent simultaneously.
Press <Esc> to return to the Advanced Chipset Features screen.
AGP & P2P Bridge Control
Scroll to this item and press <Enter> to view the following screen:
Phoenix – AwardBIOS CMOS Setup Utility
AGP Aperture Size
Graphic Window WR Combin [Enabled]
↑ ↓ → ← : Move
Enter : Select
F5:Previous Values
AGP Aperture Size
This setting controls just how much system RAM can be allocated to AGP for
video purposes. The aperture is a portion of the PCI memory address range
dedicated to graphics memory address space. Host cycles that hit the aper-
ture range are forwarded to the AGP without any translation.
AGP & P2P Bridge Control
[128MB]
+/-/PU/PD:Value:
F10: Save ESC: Exit
F6:Fail-Safe Defaults
36
Item Help
Menu Level
F1:General Help
F7:Optimized Defaults
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