Jbics Limitations; Configuring Jbics Jumper Headers - Motorola M68ICS08JB User Manual

In-circuit simulator
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Preparation and Installation

2.2.1 JBICS Limitations

2.2.1.1 Port Bit PTA0
2.2.1.2 DDRA0
2.2.1.3 Port bits PTA1, PTA2, and PTA3
2.2.1.4 RST* signal

2.2.2 Configuring JBICS Jumper Headers

User's Manual
20
These sub-paragraphs describe system limitations of the JBICS.
Port A0 is used for host to MCU communications, so it is unavailable for
emulation.
Setting DDRA0, in the Data Direction Register, will stop communications with
the simulation or debugger software and will require a system reset to regain
communication with the MCU.
Port bits PTA1, PTA2, and PTA3 are temporarily disconnected from the target
system during reset.
RST* signal is limited because the signal is not a bidirectional, open-drain
signal. It is emulated as either an input or output when using the target
connectors or as two pins (one input and one output) when using the MONO8
cable.
The JBICS supports four configuration options: standalone, simulation,
evaluation, and programming.
Standalone — ICS08JBZ.exe running on the host computer (the JBICS
is not connected.) Emulation of the MCU CPU, registers, and I/O ports
are done within the host computer environment.
Simulation — Host computer connected to the JBICS via the RS-232
cable and ICS08JBZ.exe running on the host computer. This provides
access to the M68HC908JB8 MCU, internal registers, and I/O ports.
Preparation and Installation
M68ICS08JB In-Circuit Simulator
MOTOROLA

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