Mapping Register Contents Into Process Data - Eaton XNE-2CNT-2PWM User Manual

Technology module
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3 General description of the module
3.1 General information about the register interface
3.1.1

Mapping register contents into process data

A subset of the data in the register interface is mapped into the Process data of the module
(page 28) in order to allow direct external access.
Bytes 8 -23 of the process data allow reading and writing 4 32-bit-registers of the register inter-
face and can be allocated as required.
Addressing registers to be mapped
The address assignment of the register contents to be mapped can be carried out via the
process data or via the module parameters:
1 Address assignment via process data
The address for one register access is directly defined via the Process output / control
interface (page 32), byte 6 and 7 (REG_WR_ADR and REG_RD_ADR).
2 Address assignment via parameters
The address of three further registers to be mapped may be defined via Parameter data of
the module (page 25), Byte 10 to Byte 15 (ADR_AUX_REG1_RD_DATA to
ADR_AUX_REG3_WR_DATA).
Default-mapping per parameter setting:
Table 2:
Parameters
Default-
mapping per
parameter
setting
ADR AUX REG1 RD DATA
ADR AUX REG2 RD DATA
ADR AUX REG3 RD DATA
ADR AUX REG1 WR DATA
ADR AUX REG2 WR DATA
ADR AUX REG3 WR DATA
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XI/ON: XNE-2CNT-2PWM 04/2011 MN05002035Z-EN www.eaton.com
Default-
Access
Parameterization
Register no.
0x20
RD
0x21
RD
0x40
RD
0x60
WR
0x61
WR
0x70
WR
Register content
REG_CNT1_CNT
current value CNT1
REG_CNT1_MV
measured value CNT1
REG_CNT2_CNT
current value CNT2
REG_PWM1_PD
period duration PWM1
REG_PWM1_DC
mark-to-space ratio
PWM1
REG_PWM2_PD
period duration PWM2

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