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Chapter 3 AWARD BIOS USER'S GUIDE
PCI To DRAM Pipeline
Choosing Disabled will restrict pipelining of PCI DRAM write
cycles. Enabled is the default.
CPU To PCI Write Post
Choosing Enabled will enable CPU to PCI posting.
CPU To PCI IDE Posting
Choosing Disabled will allow the I/O Write port and the 1F0h
and 170h to be treated as normal I/O Write Transactions. Using
Enabled (default) will have the I/O Write cycles posted.
System BIOS Cacheable
By choosing Disabled (default) the system BIOS will be
shadowed into DRAM only. Enabled will have the system BIOS
shadowed and cacheable.
Video RAM Cacheable
Same as system BIOS Cacheable
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